From: Vinod Koul <vkoul@kernel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: "Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@somainline.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Kishon Vijay Abraham I" <kishon@ti.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Johan Hovold" <johan@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org
Subject: Re: [PATCH v6 0/5] PCI: qcom: Support using the same PHY for both RC and EP
Date: Mon, 17 Oct 2022 13:14:38 +0530 [thread overview]
Message-ID: <Y00H5te4zXVAgS7M@matsya> (raw)
In-Reply-To: <20220927092207.161501-1-dmitry.baryshkov@linaro.org>
On 27-09-22, 12:22, Dmitry Baryshkov wrote:
> Programming of QMP PCIe PHYs slightly differs between RC and EP modes.
>
> Currently both qcom and qcom-ep PCIe controllers setup the PHY in the
> default mode, making it impossible to select at runtime whether the PHY
> should be running in RC or in EP modes. Usually this is not an issue,
> since for most devices only the RC mode is used. Some devices (SDX55)
> currently support only the EP mode without supporting the RC mode (at
> this moment).
>
> Nevertheless some of the Qualcomm platforms (e.g. the aforementioned
> SDX55) would still benefit from being able to switch between RC and EP
> depending on the driver being used. While it is possible to use
> different compat strings for the PHY depending on the mode, it seems
> like an incorrect approach, since the PHY doesn't differ between
> usecases. It's the PCIe controller, who should decide how to configure
> the PHY.
>
> This patch series implements the ability to select between RC and EP
> modes, by allowing the PCIe QMP PHY driver to switch between
> programming tables.
>
> This patchseries depends on the header from the pre-6.1 phy/next. Thus
> after the 6.1 the PCIe patches can be applied independently of the PHY
> part.
Applied, thanks
--
~Vinod
prev parent reply other threads:[~2022-10-17 7:44 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-27 9:22 [PATCH v6 0/5] PCI: qcom: Support using the same PHY for both RC and EP Dmitry Baryshkov
2022-09-27 9:22 ` [PATCH v6 1/5] phy: qcom-qmp-pcie: split register tables into common and extra parts Dmitry Baryshkov
2022-09-27 9:45 ` Johan Hovold
2022-09-27 9:22 ` [PATCH v6 2/5] phy: qcom-qmp-pcie: support separate tables for EP mode Dmitry Baryshkov
2022-09-27 9:22 ` [PATCH v6 3/5] phy: qcom-qmp-pcie: Support SM8450 PCIe1 PHY in " Dmitry Baryshkov
2022-09-27 9:22 ` [PATCH v6 4/5] PCI: qcom: Setup PHY to work in RC mode Dmitry Baryshkov
2022-09-27 9:37 ` Lorenzo Pieralisi
2022-09-27 9:22 ` [PATCH v6 5/5] PCI: qcom-ep: Setup PHY to work in EP mode Dmitry Baryshkov
2022-09-27 9:37 ` Lorenzo Pieralisi
2022-10-17 7:44 ` Vinod Koul [this message]
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