From: Matt Ranostay <mranostay@ti.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: <vigneshr@ti.com>, <lpieralisi@kernel.org>, <robh@kernel.org>,
<kw@linux.com>, <bhelgaas@google.com>,
<linux-pci@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v6 0/5] PCI: add 4x lane support for pci-j721e controllers
Date: Tue, 22 Nov 2022 21:51:58 -0800 [thread overview]
Message-ID: <Y320/qN0B6i6fY7f@ubuntu> (raw)
In-Reply-To: <20221115153735.GA993634@bhelgaas>
On Tue, Nov 15, 2022 at 09:37:35AM -0600, Bjorn Helgaas wrote:
> On Tue, Nov 15, 2022 at 07:03:30AM -0800, Matt Ranostay wrote:
> > Adding of dditional support to Cadence PCIe controller (i.e. pci-j721e.c)
> > for up to 4x lanes, and reworking of driver to define maximum lanes per
> > board configuration.
> >
> > Changes from v1:
> > * Reworked 'PCI: j721e: Add PCIe 4x lane selection support' to not cause
> > regressions on 1-2x lane platforms
> >
> > Changes from v2:
> > * Correct dev_warn format string from %d to %u since lane count is a unsigned
> > integer
> > * Update CC list
> >
> > Changes from v3:
> > * Use the max_lanes setting per chip for the mask size required since bootloader
> > could have set num_lanes to a higher value that the device tree which would leave
> > in an undefined state
> > * Reorder patches do the previous change to not break bisect
> > * Remove line breaking for dev_warn to allow better grepping and since no strict
> > 80 columns anymore
> >
> > Changes from v4:
> > * Correct invalid settings for j7200 PCIe RC + EP
> > * Add j784s4 configuration for selection of 4x lanes
> >
> > Changes from v5:
> > * Dropped 'PCI: j721e: Add warnings on num-lanes misconfiguration' patch from series
> > * Reworded 'PCI: j721e: Add per platform maximum lane settings' commit message
> > * Added yaml documentation and schema checks for ti,j721e-pci-* lane checking
> >
> > Matt Ranostay (5):
> > dt-bindings: PCI: ti,j721e-pci-*: add checks for num-lanes
> > PCI: j721e: Add per platform maximum lane settings
> > PCI: j721e: Add PCIe 4x lane selection support
> > dt-bindings: PCI: ti,j721e-pci-*: add j784s4-pci-* compatible strings
> > PCI: j721e: add j784s4 PCIe configuration
>
> Hi Matt,
>
> Don't repost just for this, but if you have occasion to post this
> again, capitalize this subject line to match the others, i.e.,
> "Add j784s4 configuration".
>
> Also looks like some commit logs are wrapped at about 65 columns; it's
> nice if they're consistently 75.
Noted... I know this rule, and someone missed wrapping it 75 columns :-/
- Matt
prev parent reply other threads:[~2022-11-23 5:52 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-15 15:03 [PATCH v6 0/5] PCI: add 4x lane support for pci-j721e controllers Matt Ranostay
2022-11-15 15:03 ` [PATCH v6 1/5] dt-bindings: PCI: ti,j721e-pci-*: add checks for num-lanes Matt Ranostay
2022-11-23 16:04 ` Krzysztof Kozlowski
2022-11-24 7:58 ` Matt Ranostay
2022-11-24 9:26 ` Krzysztof Kozlowski
2022-11-15 15:03 ` [PATCH v6 2/5] PCI: j721e: Add per platform maximum lane settings Matt Ranostay
2022-11-15 15:03 ` [PATCH v6 3/5] PCI: j721e: Add PCIe 4x lane selection support Matt Ranostay
2022-11-15 15:03 ` [PATCH v6 4/5] dt-bindings: PCI: ti,j721e-pci-*: add j784s4-pci-* compatible strings Matt Ranostay
2022-11-23 16:04 ` Krzysztof Kozlowski
2022-11-15 15:03 ` [PATCH v6 5/5] PCI: j721e: add j784s4 PCIe configuration Matt Ranostay
2022-11-15 15:37 ` [PATCH v6 0/5] PCI: add 4x lane support for pci-j721e controllers Bjorn Helgaas
2022-11-23 5:51 ` Matt Ranostay [this message]
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