From: Jason Gunthorpe <jgg@nvidia.com>
To: Baolu Lu <baolu.lu@linux.intel.com>
Cc: Joerg Roedel <joro@8bytes.org>,
Christoph Hellwig <hch@infradead.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Kevin Tian <kevin.tian@intel.com>,
Ashok Raj <ashok.raj@intel.com>, Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Jean-Philippe Brucker <jean-philippe@linaro.com>,
Dave Jiang <dave.jiang@intel.com>,
Fenghua Yu <fenghua.yu@intel.com>, Vinod Koul <vkoul@kernel.org>,
Eric Auger <eric.auger@redhat.com>, Liu Yi L <yi.l.liu@intel.com>,
Jacob jun Pan <jacob.jun.pan@intel.com>,
Zhangfei Gao <zhangfei.gao@linaro.org>,
Zhu Tony <tony.zhu@intel.com>,
iommu@lists.linux.dev, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org,
Jean-Philippe Brucker <jean-philippe@linaro.org>
Subject: Re: [PATCH v12 12/17] arm-smmu-v3/sva: Add SVA domain support
Date: Mon, 29 Aug 2022 14:29:13 -0300 [thread overview]
Message-ID: <Ywz3aQ57PthSYycN@nvidia.com> (raw)
In-Reply-To: <fe5c459e-9992-73b6-35b4-59ef815f1f9a@linux.intel.com>
On Sun, Aug 28, 2022 at 09:57:21PM +0800, Baolu Lu wrote:
> On 2022/8/26 22:56, Jason Gunthorpe wrote:
> > On Fri, Aug 26, 2022 at 08:11:36PM +0800, Lu Baolu wrote:
> >
> > > +static const struct iommu_domain_ops arm_smmu_sva_domain_ops = {
> > > + .set_dev_pasid = arm_smmu_sva_set_dev_pasid,
> > Do we want to permit drivers to not allow a SVA domain to be set on a
> > RID?
> >
> > It seems like a weird restriction to me
>
> Conceptually as long as the page table is compatible and user pages are
> pinned (or I/O page fault is supported), the device drivers are valid to
> set SVA domain to a RID. But I don't see a real use case as far as I can
> see.
It may be interesting for something like DPDK type applications where
having the entire process address space mapped SVA to the device could
be quite nice.
You, currently, give up interrupts, but perhaps that is solvable in some
way.
So, IDK.. I wouldn't dismiss it entirely but I wouldn't do a bunch of
work to support it either.
> A reasonable use case is sharing EPT between KVM and IOMMU. That demands
> a new type of domain and implements its own .set_dev for page table
> attachment.
Not everything is virtualization :)
Jason
next prev parent reply other threads:[~2022-08-29 17:29 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-26 12:11 [PATCH v12 00/17] iommu: SVA and IOPF refactoring Lu Baolu
2022-08-26 12:11 ` [PATCH v12 01/17] iommu: Add max_pasids field in struct iommu_device Lu Baolu
2022-08-26 12:11 ` [PATCH v12 02/17] iommu: Add max_pasids field in struct dev_iommu Lu Baolu
2022-08-26 12:11 ` [PATCH v12 03/17] iommu: Remove SVM_FLAG_SUPERVISOR_MODE support Lu Baolu
2022-08-26 12:11 ` [PATCH v12 04/17] PCI: Enable PASID only when ACS RR & UF enabled on upstream path Lu Baolu
2022-08-26 14:26 ` Jason Gunthorpe
2022-08-26 12:11 ` [PATCH v12 05/17] iommu: Add attach/detach_dev_pasid iommu interface Lu Baolu
2022-08-26 14:37 ` Jason Gunthorpe
2022-08-28 12:52 ` Baolu Lu
2022-08-26 12:11 ` [PATCH v12 06/17] iommu: Add IOMMU SVA domain support Lu Baolu
2022-08-26 12:11 ` [PATCH v12 07/17] iommu: Try to allocate blocking domain when probing device Lu Baolu
2022-08-26 14:52 ` Jason Gunthorpe
2022-08-29 3:40 ` Baolu Lu
2022-08-29 17:27 ` Jason Gunthorpe
2022-08-30 1:46 ` Baolu Lu
2022-08-30 13:29 ` Jason Gunthorpe
2022-08-31 1:49 ` Baolu Lu
2022-08-31 14:10 ` Jason Gunthorpe
2022-09-01 10:44 ` Baolu Lu
2022-09-02 12:48 ` Jason Gunthorpe
2022-08-26 12:11 ` [PATCH v12 08/17] iommu: Make free of iommu_domain_ops optional Lu Baolu
2022-08-26 14:53 ` Jason Gunthorpe
2022-08-26 14:55 ` Jason Gunthorpe
2022-08-26 12:11 ` [PATCH v12 09/17] iommu/vt-d: Add blocking domain support Lu Baolu
2022-08-26 14:54 ` Jason Gunthorpe
2022-08-28 12:55 ` Baolu Lu
2022-08-26 12:11 ` [PATCH v12 10/17] iommu/vt-d: Add SVA " Lu Baolu
2022-08-26 12:11 ` [PATCH v12 11/17] arm-smmu-v3: Add blocking " Lu Baolu
2022-08-26 14:31 ` Jason Gunthorpe
2022-08-26 12:11 ` [PATCH v12 12/17] arm-smmu-v3/sva: Add SVA " Lu Baolu
2022-08-26 14:56 ` Jason Gunthorpe
2022-08-28 13:57 ` Baolu Lu
2022-08-29 17:29 ` Jason Gunthorpe [this message]
2022-08-30 2:04 ` Baolu Lu
2022-08-26 12:11 ` [PATCH v12 13/17] iommu/sva: Refactoring iommu_sva_bind/unbind_device() Lu Baolu
2022-08-30 7:30 ` Yuan Can
2022-08-30 7:45 ` Baolu Lu
2022-08-30 7:46 ` Baolu Lu
2022-08-26 12:11 ` [PATCH v12 14/17] iommu: Remove SVA related callbacks from iommu ops Lu Baolu
2022-08-26 12:11 ` [PATCH v12 15/17] iommu: Prepare IOMMU domain for IOPF Lu Baolu
2022-08-26 12:11 ` [PATCH v12 16/17] iommu: Per-domain I/O page fault handling Lu Baolu
2022-08-26 12:11 ` [PATCH v12 17/17] iommu: Rename iommu-sva-lib.{c,h} Lu Baolu
2022-08-26 15:50 ` [PATCH v12 00/17] iommu: SVA and IOPF refactoring Jason Gunthorpe
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Ywz3aQ57PthSYycN@nvidia.com \
--to=jgg@nvidia.com \
--cc=ashok.raj@intel.com \
--cc=baolu.lu@linux.intel.com \
--cc=bhelgaas@google.com \
--cc=dave.jiang@intel.com \
--cc=eric.auger@redhat.com \
--cc=fenghua.yu@intel.com \
--cc=hch@infradead.org \
--cc=iommu@lists.linux.dev \
--cc=jacob.jun.pan@intel.com \
--cc=jean-philippe@linaro.com \
--cc=jean-philippe@linaro.org \
--cc=joro@8bytes.org \
--cc=kevin.tian@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=robin.murphy@arm.com \
--cc=tony.zhu@intel.com \
--cc=vkoul@kernel.org \
--cc=will@kernel.org \
--cc=yi.l.liu@intel.com \
--cc=zhangfei.gao@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).