Re: [PATCH] PCI: dwc: Allow platform driver to skip the wait for link

[Lorenzo Pieralisi <lpieralisi@kernel.org>]

On Tue, Apr 04, 2023 at 11:11:41PM +0530, Ajay Agarwal wrote:
> Currently as a part of device probe, the driver waits for the
> link to come up for up to 1 second. If the link training is not
> enabled by default or as a part of host_init, then this wait for
> the link can be skipped to save the 1 second of wait time.
> 
> Allow the platform driver to skip this wait for the link up by
> setting a flag `skip_wait_for_link`. This flag will be false by
> default, thereby preserving the legacy behavior for existing
> platform drivers.
> 
> Signed-off-by: Ajay Agarwal <ajayagarwal@google.com>
> ---
>  drivers/pci/controller/dwc/pcie-designware-host.c | 9 +++++++--
>  drivers/pci/controller/dwc/pcie-designware.h      | 1 +
>  2 files changed, 8 insertions(+), 2 deletions(-)

A previous patch handles this change, dropping this one,
please chime in in this thread if needed:

https://lore.kernel.org/linux-pci/ZC12lN9Cs0QlPhVh@lpieralisi

> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 9952057c8819..3425eb17b467 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -491,8 +491,13 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
>  			goto err_remove_edma;
>  	}
>  
> -	/* Ignore errors, the link may come up later */
> -	dw_pcie_wait_for_link(pci);
> +	/*
> +	 * If the platform driver sets `skip_wait_for_link` because it knows the
> +	 * link will not be up, do not wait for it. Save 1 sec of wait time.
> +	 * Else, test for the link. Ignore errors, the link may come up later
> +	 */
> +	if (!pp->skip_wait_for_link)
> +		dw_pcie_wait_for_link(pci);
>  
>  	bridge->sysdata = pp;
>  
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index 79713ce075cc..f8f6dad5c948 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -297,6 +297,7 @@ struct dw_pcie_host_ops {
>  struct dw_pcie_rp {
>  	bool			has_msi_ctrl:1;
>  	bool			cfg0_io_shared:1;
> +	bool			skip_wait_for_link:1;
>  	u64			cfg0_base;
>  	void __iomem		*va_cfg0_base;
>  	u32			cfg0_size;
> -- 
> 2.40.0.348.gf938b09366-goog
>