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[66.111.4.228]) by smtp.gmail.com with ESMTPSA id y3-20020a37f603000000b0074382b756c2sm18995913qkj.14.2023.03.29.18.56.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 18:56:56 -0700 (PDT) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailauth.nyi.internal (Postfix) with ESMTP id B15CA27C005A; Wed, 29 Mar 2023 21:56:55 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Wed, 29 Mar 2023 21:56:55 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvhedrvdehjedghedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhepfffhvfevuffkfhggtggujgesthdtredttddtvdenucfhrhhomhepuehoqhhu nhcuhfgvnhhguceosghoqhhunhdrfhgvnhhgsehgmhgrihhlrdgtohhmqeenucggtffrrg htthgvrhhnpeeigeethfejvdfhudegtdevtefhleelffegteevtdelgfeugefhhffhteeg iefhheenucffohhmrghinheplhifnhdrnhgvthenucevlhhushhtvghrufhiiigvpedtne curfgrrhgrmhepmhgrihhlfhhrohhmpegsohhquhhnodhmvghsmhhtphgruhhthhhpvghr shhonhgrlhhithihqdeiledvgeehtdeigedqudejjeekheehhedvqdgsohhquhhnrdhfvg hngheppehgmhgrihhlrdgtohhmsehfihigmhgvrdhnrghmvg X-ME-Proxy: Feedback-ID: iad51458e:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Wed, 29 Mar 2023 21:56:54 -0400 (EDT) Date: Wed, 29 Mar 2023 18:56:12 -0700 From: Boqun Feng To: Dexuan Cui Cc: quic_jhugo@quicinc.com, quic_carlv@quicinc.com, wei.liu@kernel.org, kys@microsoft.com, haiyangz@microsoft.com, sthemmin@microsoft.com, lpieralisi@kernel.org, bhelgaas@google.com, linux-hyperv@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, mikelley@microsoft.com, robh@kernel.org, kw@linux.com, helgaas@kernel.org, alex.williamson@redhat.com, stable@vger.kernel.org, Greg Kroah-Hartman , Sasha Levin Subject: Re: [PATCH v2] PCI: hv: Fix the definition of vector in hv_compose_msi_msg() Message-ID: References: <20221027205256.17678-1-decui@microsoft.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221027205256.17678-1-decui@microsoft.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org [Cc stable] On Thu, Oct 27, 2022 at 01:52:56PM -0700, Dexuan Cui wrote: > The local variable 'vector' must be u32 rather than u8: see the > struct hv_msi_desc3. > > 'vector_count' should be u16 rather than u8: see struct hv_msi_desc, > hv_msi_desc2 and hv_msi_desc3. > Dexuan, I think this patch should only be in 5.15, because... > Fixes: a2bad844a67b ("PCI: hv: Fix interrupt mapping for multi-MSI") ^^^ this commit is already in 5.15.y (commit id 92dcb50f7f09). Upstream id e70af8d040d2b7904dca93d942ba23fb722e21b1 Cc: # 5.15.x Regards, Boqun > Signed-off-by: Dexuan Cui > Cc: Jeffrey Hugo > Cc: Carl Vanderlip > --- > > v1 was posted here (sorry, I forgot to follow this up...): > https://lwn.net/ml/linux-kernel/20220815185505.7626-1-decui@microsoft.com/ > > Changes in v2: > Added the explicit "(u8)" cast in hv_compose_msi_msg(). > Added and improved the comments. > Fixed a typo in the subject in v1: s/definiton/definition > > drivers/pci/controller/pci-hyperv.c | 22 ++++++++++++++++------ > 1 file changed, 16 insertions(+), 6 deletions(-) > > diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c > index e7c6f6629e7c..ba64284eaf9f 100644 > --- a/drivers/pci/controller/pci-hyperv.c > +++ b/drivers/pci/controller/pci-hyperv.c > @@ -1614,7 +1614,7 @@ static void hv_pci_compose_compl(void *context, struct pci_response *resp, > > static u32 hv_compose_msi_req_v1( > struct pci_create_interrupt *int_pkt, const struct cpumask *affinity, > - u32 slot, u8 vector, u8 vector_count) > + u32 slot, u8 vector, u16 vector_count) > { > int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE; > int_pkt->wslot.slot = slot; > @@ -1642,7 +1642,7 @@ static int hv_compose_msi_req_get_cpu(const struct cpumask *affinity) > > static u32 hv_compose_msi_req_v2( > struct pci_create_interrupt2 *int_pkt, const struct cpumask *affinity, > - u32 slot, u8 vector, u8 vector_count) > + u32 slot, u8 vector, u16 vector_count) > { > int cpu; > > @@ -1661,7 +1661,7 @@ static u32 hv_compose_msi_req_v2( > > static u32 hv_compose_msi_req_v3( > struct pci_create_interrupt3 *int_pkt, const struct cpumask *affinity, > - u32 slot, u32 vector, u8 vector_count) > + u32 slot, u32 vector, u16 vector_count) > { > int cpu; > > @@ -1701,7 +1701,12 @@ static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) > struct compose_comp_ctxt comp; > struct tran_int_desc *int_desc; > struct msi_desc *msi_desc; > - u8 vector, vector_count; > + /* > + * vector_count should be u16: see hv_msi_desc, hv_msi_desc2 > + * and hv_msi_desc3. vector must be u32: see hv_msi_desc3. > + */ > + u16 vector_count; > + u32 vector; > struct { > struct pci_packet pci_pkt; > union { > @@ -1767,6 +1772,11 @@ static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) > vector_count = 1; > } > > + /* > + * hv_compose_msi_req_v1 and v2 are for x86 only, meaning 'vector' > + * can't exceed u8. Cast 'vector' down to u8 for v1/v2 explicitly > + * for better readability. > + */ > memset(&ctxt, 0, sizeof(ctxt)); > init_completion(&comp.comp_pkt.host_event); > ctxt.pci_pkt.completion_func = hv_pci_compose_compl; > @@ -1777,7 +1787,7 @@ static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) > size = hv_compose_msi_req_v1(&ctxt.int_pkts.v1, > dest, > hpdev->desc.win_slot.slot, > - vector, > + (u8)vector, > vector_count); > break; > > @@ -1786,7 +1796,7 @@ static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) > size = hv_compose_msi_req_v2(&ctxt.int_pkts.v2, > dest, > hpdev->desc.win_slot.slot, > - vector, > + (u8)vector, > vector_count); > break; > > -- > 2.25.1 >