Re: [PATCH v7 1/2] PCI: designware-ep: Fix DBI access before core init

[Niklas Cassel <Niklas.Cassel@wdc.com>]

On Fri, Jan 19, 2024 at 12:58:46PM +0530, Manivannan Sadhasivam wrote:
> On Thu, Jan 18, 2024 at 06:33:35PM +0000, Niklas Cassel wrote:

(snip)

> > A nicer solution would probably be to modify dw_pcie_ep_set_bar() to
> > properly handle controllers with the Resizable BAR capability, and remove
> > the RESBAR related code from dw_pcie_ep_init_complete().
> > 
> > However, that would still require changes in pci-epf-test.c to call
> > set_bar() after a hot reset/link-down reset (and it is not possible
> > to distinguish between them), which could be done by either:
> > 1) Making sure that the glue drivers (that implement Resizable BAR capability)
> >  call dw_pcie_ep_init_notify() when receiving a hot reset/link-down reset
> >  IRQ (or maybe instead when getting the link up IRQ), as that will
> >  trigger pci-epf-test.c to (once again) call set_bar().
> > or
> > 2) Modifying pci-epf-test.c:pci_epf_test_link_up() to call set_bar()
> >  (If epc_features doesn't have a core_init_notifier, as in that case
> >  set_bar() is called by pci_epf_test_core_init()).
> >  (Since I assume that not all SoCs might have a PERST GPIO.)
> > or
> > 3) We could allow glue drivers that use an internal refclk to still make
> >  use of the PERST GPIO IRQ, and only call dw_pcie_ep_init_notify(),
> >  as that would also cause pci-epf-test.c to call set_bar().
> >  (These glue drivers, which implement the Resizable BAR capability would
> >  however not need to perform a full core reset, etc. in the PERST GPIO
> >  IRQ handler, they only need to call dw_pcie_ep_init_notify().)
> > 
> > Right now, I think I prefer 1).
> > 
> > What do you think?
> > 
> 
> [For this context, I'm not only focusing on REBAR but all of the non-sticky DWC
> registers]
> 
> If the PCIe spec has mandated using PERST# for all endpoints, I would've
> definitely went with option 3. But the spec has made PERST# as optional for the
> endpoints, so we cannot force the glue drivers to make use of PERST# IRQ.
> 
> But the solution I'm thinking is, we should reconfigure all non-sticky DWC
> registers during LINK_DOWN phase irrespective of whether core_init_notifier is
> used or not. This should work for both cases because we can skip configuring the
> DWC registers when the core_init platforms try to do it again during PERST#
> deassert.
> 
> Wdyt?

I'm guessing you mean something like, create a dw_pcie_ep_linkdown() function,
that:
1) calls a dwc_pcie_ep_reinit_non_sticky()
2) calls pci_epc_linkdown()

If so, I like the suggestion.


The only problem I can see is that not all DWC EP glue drivers might have
an IRQ for link down. But I don't see any better way.
(I guess the glue drivers that don't have an IRQ on link down could have a
kthread that polls dw_pcie_link_up(), if they want to be able to handle the
RC/host rebooting.)

One thing comes to mind though...
Some EPF drivers might have a .link_down handler, which might e.g. dealloc the
memory backing the BARs. But I guess that is fine, as long as we have called
dwc_pcie_ep_reinit_non_sticky() before calling pci_epc_linkdown(), the
non-sticky registers have been re-initialized, so even if a EPF driver performs
a .link_down() + .link_up(), the non-sticky registers in DWC core should still
have proper values set.


Kind regards,
Niklas