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[34.126.93.108]) by smtp.gmail.com with ESMTPSA id px12-20020a17090b270c00b0028e17b2f27esm58229pjb.13.2024.01.12.02.00.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 02:00:23 -0800 (PST) Date: Fri, 12 Jan 2024 15:30:15 +0530 From: Ajay Agarwal To: Manivannan Sadhasivam Cc: Johan Hovold , Lorenzo Pieralisi , Jingoo Han , Gustavo Pimentel , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Andersson , Sajid Dalvi Subject: Re: [PATCH] Revert "PCI: dwc: Wait for link up only if link is started" Message-ID: References: <20230706082610.26584-1-johan+linaro@kernel.org> <20230706125811.GD4808@thinkpad> <20230711073719.GA36617@thinkpad> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20230711073719.GA36617@thinkpad> On Tue, Jul 11, 2023 at 01:07:19PM +0530, Manivannan Sadhasivam wrote: > On Mon, Jul 10, 2023 at 09:51:22PM +0530, Ajay Agarwal wrote: > > On Fri, Jul 07, 2023 at 02:47:56PM +0200, Johan Hovold wrote: > > > On Thu, Jul 06, 2023 at 06:28:11PM +0530, Manivannan Sadhasivam wrote: > > > > On Thu, Jul 06, 2023 at 10:26:10AM +0200, Johan Hovold wrote: > > > > > > > > Finally, note that the intel-gw driver is the only driver currently not > > > > > providing a start_link callback and instead starts the link in its > > > > > host_init callback, and which may avoid an additional one-second timeout > > > > > during probe by making the link-up wait conditional. If anyone cares, > > > > > that can be done in a follow-up patch with a proper motivation. > > > > > > > The offending commit is bogus since it makes the intel-gw _special_ w.r.t > > > > waiting for the link up. Most of the drivers call dw_pcie_host_init() during the > > > > probe time and they all have to wait for 1 sec if the slot is empty. > > Mani, can you please explain how my commit made the intel-gw driver > > special? The intel driver actually fails the dw_pcie_host_init if the > > link does not come up. That was my motivation behind adding the fail > > logic in the core driver as well. > > Your commit ended up failing the probe, if dw_pcie_wait_for_link() fails for > SoCs defining start_link() callback, which is the case for all the drivers > except intel-gw. I take back my _special_ argument since it was special before > your commit and now you just made its behavior applicable to all SoCs. > You are right. I should not have returned an error from the dw_pcie_wait_for_link check. Raised v5 with the error return removed: https://lore.kernel.org/all/20240112093006.2832105-1-ajayagarwal@google.com/ > > > > > > Just to clarify, the intel-gw driver starts the link and waits for link > > > up in its host_init() callback, which is called during probe. That wait > > > could possibly just be dropped in favour of the one in > > > dw_pcie_host_init() and/or the driver could be reworked to implement > > > start_link(). > > > > > > Either way, the call in dw_pcie_host_init() will only add an additional > > > 1 second delay in cases where the link did *not* come up. > > > > > > > As Johan noted, intel-gw should make use of the async probe to avoid the boot > > > > delay instead of adding a special case. > > > > > > Indeed. > > > > > > Johan > > Johan, Mani > > My apologies for adding this regression in some of the SOCs. > > May I suggest to keep my patch and make the following change instead? > > This shall keep the existing behavior as is, and save the boot time > > for drivers that do not define the start_link()? > > > > No, IMO the offending commit was wrong in serving its purpose so a revert makes > sense. Because, if the intention was to reduce the boot delay then it did not > fix that because dw_pcie_wait_for_link() is still called from intel-gw's > host_init() callback. You just skipped another instance which is there in > dw_pcie_host_init(). > > So to fix this issue properly intel-gw needs to do 2 things: > > 1. Move the ltssm_enable to start_link() callback and get rid of > dw_pcie_wait_for_link() from its host_init() callback. If there is any special > reason to not do this way, please explain. > > 2. Enable async probe so that other drivers can continue probing while this > driver waits for the link to be up. This will almost make the delay negligible. > > The above 2 should be done in separate patches. > > - Mani > Mani, the intention is not to fix the intel-gw driver in any manner. It calls dw_pcie_wait_for_link explicitly in the probe path and checks for the error as well. So it has to live with the delay and the probe failure if the link does not come up. My intention is just to get rid of the 1 sec delay for the drivers that do not define the start_link callback, and hence do not expect that the link will come up during probe anyway. > > ``` > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c > > index cf61733bf78d..af6a7cd060b1 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > > @@ -492,11 +492,8 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp) > > if (ret) > > goto err_remove_edma; > > > > - if (pci->ops && pci->ops->start_link) { > > - ret = dw_pcie_wait_for_link(pci); > > - if (ret) > > - goto err_stop_link; > > - } > > + if (pci->ops && pci->ops->start_link) > > + dw_pcie_wait_for_link(pci); > > } > > > > bridge->sysdata = pp; > > ``` > > -- > மணிவண்ணன் சதாசிவம்