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[34.124.253.223]) by smtp.gmail.com with ESMTPSA id kv15-20020a17090328cf00b001d706912d1esm6041302plb.225.2024.02.05.03.00.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Feb 2024 03:00:28 -0800 (PST) Date: Mon, 5 Feb 2024 16:30:20 +0530 From: Ajay Agarwal To: Manivannan Sadhasivam Cc: Lorenzo Pieralisi , Bjorn Helgaas , Jingoo Han , Johan Hovold , Jon Hunter , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Manu Gautam , Doug Zobel , William McVicker , Serge Semin , Robin Murphy , linux-pci@vger.kernel.org Subject: Re: [PATCH v5] PCI: dwc: Wait for link up only if link is started Message-ID: References: <20240129071025.GE2971@thinkpad> <20240129081254.GF2971@thinkpad> <20240130064555.GC32821@thinkpad> <20240130122906.GE83288@thinkpad> <20240130183626.GE4218@thinkpad> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240130183626.GE4218@thinkpad> On Wed, Jan 31, 2024 at 12:06:26AM +0530, Manivannan Sadhasivam wrote: > On Tue, Jan 30, 2024 at 10:48:59PM +0530, Ajay Agarwal wrote: > > On Tue, Jan 30, 2024 at 05:59:06PM +0530, Manivannan Sadhasivam wrote: > > > On Tue, Jan 30, 2024 at 02:30:27PM +0530, Ajay Agarwal wrote: > > > > > > [...] > > > > > > > > > > > > If that's the case with your driver, when are you starting the link training? > > > > > > > > > > > > > > > > > The link training starts later based on a userspace/debugfs trigger. > > > > > > > > > > > > > > > > > > > > > > Why does it happen as such? What's the problem in starting the link during > > > > > > > probe? Keep it in mind that if you rely on the userspace for starting the link > > > > > > > based on a platform (like Android), then if the same SoC or peripheral instance > > > > > > > get reused in other platform (non-android), the it won't be a seamless user > > > > > > > experience. > > > > > > > > > > > > > > If there are any other usecases, please state them. > > > > > > > > > > > > > > - Mani > > > > > > > > > > > > > This SoC is targeted for an android phone usecase and the endpoints > > > > > > being enumerated need to go through an appropriate and device specific > > > > > > power sequence which gets triggered only when the userspace is up. The > > > > > > PCIe probe cannot assume that the EPs have been powered up already and > > > > > > hence the link-up is not attempted. > > > > > > > > > > Still, I do not see the necessity to not call start_link() during probe. If you > > > > I am not adding any logic/condition around calling the start_link() > > > > itself. I am only avoiding the wait for the link to be up if the > > > > controller driver has not defined start_link(). > > > > > > > > > > I'm saying that not defining the start_link() callback itself is wrong. > > > > > Whether the start_link() should be defined or not, is a different > > design discussion. We currently have 2 drivers in upstream (intel-gw and > > dw-plat) which do not have start_link() defined. Waiting for the link to > > come up for the platforms using those drivers is not a good idea. And > > that is what we are trying to avoid. > > > > NO. The sole intention of this patch is to fix the delay observed with _your_ > out-of-tree controller driver as you explicitly said before. Impact for the > existing 2 drivers are just a side effect. > Hi Mani, What is the expectation from the pcie-designware-host driver? If the .start_link() has to be defined by the vendor driver, then shouldn't the probe be failed if the vendor has not defined it? Thereby failing the probe for intel-gw and pcie-dw-plat drivers? Additionally, if the link fails to come up even after 1 sec of wait time, shouldn't the probe be failed in that case too? My understanding of these drivers is that the .start_link() is an OPTIONAL callback and that the dw_pcie_host_init should help setup the SW structures regardless of whether the .start_link() has been defined or not, and whether the link is up or not. The vendor should be allowed to train the link at a later point of time as well. Please let me know your thoughts. > > > > > add PROBE_PREFER_ASYNCHRONOUS to your controller driver, this delay would become > > > > > negligible. The reason why I'm against not calling start_link() is due to below > > > > > reasons: > > > > > > > > > > 1. If the same SoC gets reused for other platforms, even other android phones > > > > > that powers up the endpoints during boot, then it creates a dependency with > > > > > userspace to always start the link even though the devices were available. > > > > > That's why we should never fix the behavior of the controller drivers based on a > > > > > single platform. > > > > I wonder how the behavior is changing with this patch. Do you have an > > > > example of a platform which does not have start_link() defined but would > > > > like to still wait for a second for the link to come up? > > > > > > > > > > Did you went through my reply completely? I mentioned that the 1s delay would be > > > gone if you add the async flag to your driver and you are ignoring that. > > > The async probe might not help in all the cases. Consider a situation where the PCIe is probed after the boot is already completed. The user will face the delay then. Do you agree? > > Yes, I did go through your suggestion of async probe and that might > > solve my problem of the 1 sec delay. But I would like to fix the problem > > at the core. > > > > There is no problem at the core. The problem is with some controller drivers. > Please do not try to fix a problem which is not there. There are no _special_ > reasons for those 2 drivers to not define start_link() callback. I'm trying to > point you in the right path, but you are always chosing the other one. > > > > But again, I'm saying that not defining start_link() itself is wrong and I've > > > already mentioned the reasons. > > > > > > > For example, consider the intel-gw driver. The 1 sec wait time in its > > > > probe path is also a waste because it explicitly starts link training > > > > later in time. > > > > > > > > > > I previously mentioned that the intel-gw needs fixing since there is no point in > > > starting the link and waiting for it to come up in its probe() if the DWC core > > > is already doing that. > > > > > > - Mani > > > > > > -- > > > மணிவண்ணன் சதாசிவம் > > I think we are at a dead-end in terms of agreeing to a policy. I would > > like the maintainers to pitch in here with their views. > > I'm the maintainer of the DWC drivers that you are proposing the patch for. If > you happen to spin future revision of this series, please carry: > > Nacked-by: Manivannan Sadhasivam > > - Mani > > -- > மணிவண்ணன் சதாசிவம்