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Date: Wed, 3 Apr 2024 10:26:40 +0200
From: Lukas Wunner <lukas@wunner.de>
To: Dave Jiang <dave.jiang@intel.com>
Cc: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
	dan.j.williams@intel.com, ira.weiny@intel.com,
	vishal.l.verma@intel.com, alison.schofield@intel.com,
	Jonathan.Cameron@huawei.com, dave@stgolabs.net, bhelgaas@google.com
Subject: Re: [PATCH v3 2/4] PCI: Add check for CXL Secondary Bus Reset
Message-ID: <Zg0SwGmelNpY__5f@wunner.de>
References: <20240402234848.3287160-1-dave.jiang@intel.com>
 <20240402234848.3287160-3-dave.jiang@intel.com>
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In-Reply-To: <20240402234848.3287160-3-dave.jiang@intel.com>

On Tue, Apr 02, 2024 at 04:45:30PM -0700, Dave Jiang wrote:
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -4927,10 +4927,55 @@ static int pci_dev_reset_slot_function(struct pci_dev *dev, bool probe)
>  	return pci_reset_hotplug_slot(dev->slot->hotplug, probe);
>  }
>  
> +static int cxl_port_dvsec(struct pci_dev *dev)
> +{
> +	return pci_find_dvsec_capability(dev, PCI_VENDOR_ID_CXL,
> +					 PCI_DVSEC_CXL_PORT);
> +}

Hm, seems a bit odd that this returns an int even though
pci_find_dvsec_capability() returns a u16 and all the callers
of cxl_port_dvsec() seem to assign the return value to a u16
as well.  Is the "int" on purpose?

Thanks,

Lukas