From: Niklas Cassel <cassel@kernel.org>
To: Rob Herring <robh@kernel.org>
Cc: "Jingoo Han" <jingoohan1@gmail.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Arnd Bergmann" <arnd@arndb.de>,
"Damien Le Moal" <dlemoal@kernel.org>,
"Jon Lin" <jon.lin@rock-chips.com>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Simon Xue" <xxm@rock-chips.com>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-rockchip@lists.infradead.org
Subject: Re: [PATCH 04/12] dt-bindings: rockchip: Add DesignWare based PCIe Endpoint controller
Date: Tue, 30 Apr 2024 13:34:58 +0200 [thread overview]
Message-ID: <ZjDXYguzuhnJAcfg@ryzen.lan> (raw)
In-Reply-To: <20240425160809.GA2613935-robh@kernel.org>
On Thu, Apr 25, 2024 at 11:08:09AM -0500, Rob Herring wrote:
> On Wed, Apr 24, 2024 at 05:16:22PM +0200, Niklas Cassel wrote:
> > Document DT bindings for PCIe Endpoint controller found in Rockchip SoCs.
> >
> > Signed-off-by: Niklas Cassel <cassel@kernel.org>
> > ---
> > .../bindings/pci/rockchip-dw-pcie-ep.yaml | 192 +++++++++++++++++++++
> > 1 file changed, 192 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-ep.yaml
> > new file mode 100644
> > index 000000000000..57a6c542058f
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-ep.yaml
> > @@ -0,0 +1,192 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/pci/rockchip-dw-pcie-ep.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: DesignWare based PCIe Endpoint controller on Rockchip SoCs
> > +
> > +maintainers:
> > + - Niklas Cassel <cassel@kernel.org>
> > +
> > +description: |+
> > + RK3588 SoC PCIe Endpoint controller is based on the Synopsys DesignWare
> > + PCIe IP and thus inherits all the common properties defined in
> > + snps,dw-pcie-ep.yaml.
> > +
> > +allOf:
> > + - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - const: rockchip,rk3588-pcie-ep
>
> 3568 doesn't support endpoint mode? It would be good to keep the
> bindings aligned.
It does.
However, it does not have the dedicated IRQ lines for the eDMA interrupts.
I will add rk3568 to the DT binding and to the driver.
If someone wants eDMA functional for rk3568, there is further code needed,
but EP mode without eDMA should work on rk3568 as is.
> > + phys:
> > + maxItems: 1
> > +
> > + phy-names:
> > + const: pcie-phy
> > +
> > + power-domains:
> > + maxItems: 1
> > +
> > + resets:
> > + maxItems: 2
> > +
> > + reset-names:
> > + items:
> > + - const: pwr
> > + - const: pipe
>
> Most of this is all duplicated from rockchip-dw-pcie.yaml. Pull out the
> common bits to a separate schema file and reference it from the RC and
> endpoint schemas.
Ok, will fix in V2.
> You'll need to add to interrupts/interrupt-names in the common schema
> and then restrict the number of items here and in the RC schema.
Remember that eDMA can be used also in RC mode.
Even if the RC binding doesn't allow it right now, these interrupts could
be optional also for RC mode, in case someone actually wants to use them
in the future.
> > +
> > + vpcie3v3-supply: true
>
> This doesn't make sense for endpoint mode. At least in the sense this
> is supposed to be a standard slot voltage driven from the host side.
I tried not supplying the regulator for the EP side on my rock5b
(rk3588 based) platform.
The driver (in EP mode) probes correctly, but does not work without this,
regardless of how I try. Boot EP first, boot RC first.
Looking at the rock5b schematic:
https://dl.radxa.com/rock5/5b/docs/hw/radxa_rock_5b_v1423_sch.pdf
Page 7, specifically VCC3V3_PCIE30.
It does seem to only support sourcing VIN from a regulator on the local
board (VCC5V0_SYS).
(Looking at a vendor using this SoC in a board that supports EP mode
(Mixtile Blade 3), they do supply the regulator also for the EP-mode
DT node.)
I will drop the "vpcie3v3-supply" from the EP binding and keep it
only in the RC binding. (As perhaps some other rk3588 based board can
actually source the 3.3v from the PCIe slot in EP mode.)
I will keep it in the rock5b (a rk3588 based board) DT overlay,
as it is obviously needed for rock5b.
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - reg-names
> > + - clocks
> > + - clock-names
> > + - interrupts
> > + - interrupt-names
> > + - num-lanes
> > + - phys
> > + - phy-names
> > + - power-domains
> > + - resets
> > + - reset-names
>
> A bunch or all? of these can be in the common schema too.
Ok, will fix in V2.
Kind regards,
Niklas
next prev parent reply other threads:[~2024-04-30 11:35 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-24 15:16 [PATCH 00/12] PCI: dw-rockchip: Add endpoint mode support Niklas Cassel
2024-04-24 15:16 ` [PATCH 01/12] dt-bindings: PCI: snps,dw-pcie-ep: Add vendor specific reg-name Niklas Cassel
2024-04-25 15:49 ` Rob Herring
2024-04-25 15:54 ` Rob Herring
2024-04-24 15:16 ` [PATCH 02/12] dt-bindings: PCI: snps,dw-pcie-ep: Add vendor specific interrupt-names Niklas Cassel
2024-04-25 15:55 ` Rob Herring
2024-04-24 15:16 ` [PATCH 03/12] dt-bindings: PCI: snps,dw-pcie-ep: Add tx_int{a,b,c,d} legacy irqs Niklas Cassel
2024-04-25 16:20 ` Rob Herring
2024-04-24 15:16 ` [PATCH 04/12] dt-bindings: rockchip: Add DesignWare based PCIe Endpoint controller Niklas Cassel
2024-04-25 16:08 ` Rob Herring
2024-04-30 11:34 ` Niklas Cassel [this message]
2024-04-24 15:16 ` [PATCH 05/12] PCI: dw-rockchip: Fix weird indentation Niklas Cassel
2024-04-24 15:16 ` [PATCH 06/12] PCI: dw-rockchip: Add rockchip_pcie_ltssm() helper Niklas Cassel
2024-04-24 15:16 ` [PATCH 07/12] PCI: dw-rockchip: Refactor the driver to prepare for EP mode Niklas Cassel
2024-04-24 15:16 ` [PATCH 08/12] PCI: dw-rockchip: Add explicit rockchip,rk3588-pcie compatible Niklas Cassel
2024-04-24 15:16 ` [PATCH 09/12] PCI: dw-rockchip: Add endpoint mode support Niklas Cassel
2024-04-24 15:16 ` [PATCH 10/12] misc: pci_endpoint_test: Add support for rockchip rk3588 Niklas Cassel
2024-04-25 19:16 ` Frank Li
2024-04-30 11:42 ` Niklas Cassel
2024-04-24 15:16 ` [PATCH 11/12] arm64: dts: rockchip: Add PCIe endpoint mode support Niklas Cassel
2024-04-24 15:16 ` [PATCH 12/12] arm64: dts: rockchip: Add rock5b overlays for PCIe endpoint mode Niklas Cassel
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