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Date: Thu, 6 Jun 2024 15:21:02 +0200
From: Lukas Wunner <lukas@wunner.de>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Bjorn Helgaas <helgaas@kernel.org>, linuxarm@huawei.com,
	Mahesh J Salgaonkar <mahesh@linux.ibm.com>,
	Bjorn Helgaas <bhelgaas@google.com>, linux-cxl@vger.kernel.org,
	linux-pci@vger.kernel.org, Davidlohr Bueso <dave@stgolabs.net>,
	Dave Jiang <dave.jiang@intel.com>,
	Alison Schofield <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Ira Weiny <ira.weiny@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Will Deacon <will@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
	Lorenzo Pieralisi <lpieralisi@kernel.org>, terry.bowman@amd.com,
	Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>,
	Ilpo =?iso-8859-1?Q?J=E4rvinen?= <ilpo.jarvinen@linux.intel.com>
Subject: Re: [RFC PATCH 0/9] pci: portdrv: Add auxiliary bus and register CXL
 PMUs (and aer)
Message-ID: <ZmG3vjD2sbCOPrM0@wunner.de>
References: <20240529164103.31671-1-Jonathan.Cameron@huawei.com>
 <20240605180409.GA520888@bhelgaas>
 <20240605204428.00001cb2@Huawei.com>
 <20240605213910.00003034@huawei.com>
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In-Reply-To: <20240605213910.00003034@huawei.com>

On Thu, Jun 06, 2024 at 01:57:56PM +0100, Jonathan Cameron wrote:
> Or are you thinking we can make something like the following work
> (even when we can't do dynamic msix)?
> 
> Core bring up facilities and interrupt etc.  That includes bus master
> so msi/msix can be issued (which makes me nervous - putting aside other
> concerns as IIRC there are drivers where you have to be careful to
> tweak registers to ensure you don't get a storm of traffic when you
> hit bus master enable.
> 
> Specific driver may bind later - everything keeps running until 
> the specific driver calls pci_alloc_irq_vectors(), then we have to disable all
> interrupts for core managed services, change the number of vectors and
> then move them to wherever they end up before starting them again.
> We have to do the similar in the unwind path.

My recollection is that Thomas Gleixner has brought up dynamic MSI-X
allocation.  So if both the PCI core services as well as the driver
use MSI-X, there's no problem.

For MSI, one approach might be to reserve a certain number of vectors
in the core for later use by the driver.

Thanks,

Lukas