From: Johan Hovold <johan@kernel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: "Richard Zhu" <hongxing.zhu@nxp.com>,
"Lucas Stach" <l.stach@pengutronix.de>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Shawn Guo" <shawnguo@kernel.org>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Chuanhua Lei" <lchuanhua@maxlinear.com>,
"Marek Vasut" <marek.vasut+renesas@gmail.com>,
"Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
imx@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-renesas-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org,
abel.vesa@linaro.org, johan+linaro@kernel.org,
"Shashank Babu Chinta Venkata" <quic_schintav@quicinc.com>
Subject: Re: [PATCH v6 3/4] PCI: qcom: Add equalization settings for 16.0 GT/s
Date: Thu, 5 Sep 2024 18:27:36 +0200 [thread overview]
Message-ID: <Ztnb-GauC_8D8N-i@hovoldconsulting.com> (raw)
In-Reply-To: <20240905152742.4llkcjvvu3klmo6j@thinkpad>
On Thu, Sep 05, 2024 at 08:57:42PM +0530, Manivannan Sadhasivam wrote:
> On Wed, Sep 04, 2024 at 11:39:09AM +0200, Johan Hovold wrote:
> > > diff --git a/drivers/pci/controller/dwc/pcie-qcom-common.h b/drivers/pci/controller/dwc/pcie-qcom-common.h
> > > new file mode 100644
> > > index 000000000000..259e04b7bdf9
> > > --- /dev/null
> > > +++ b/drivers/pci/controller/dwc/pcie-qcom-common.h
> > > @@ -0,0 +1,8 @@
> > > +/* SPDX-License-Identifier: GPL-2.0 */
> > > +/*
> > > + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
> > > + */
> > > +
> > > +#include "pcie-designware.h"
> >
> > You only need a forward declaration:
> >
> > struct dw_pcie;
> >
> > > +
> > > +void qcom_pcie_common_set_16gt_eq_settings(struct dw_pcie *pci);
> >
> > Compile guard still missing.
Sorry, I meant to say *include* guard here.
> Perhaps we can just get rid of the Kconfig entry and build it by default for
> both RC and EP drivers? I don't see a value in building it as a separate module.
> And we may also move more common code in the future.
It is already built by default for both drivers. I'm not sure what
you're suggesting here.
Johan
next prev parent reply other threads:[~2024-09-05 16:27 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-04 7:11 [PATCH v6 0/4] PCI: qcom: Add 16.0 GT/s equalization and margining settings Manivannan Sadhasivam via B4 Relay
2024-09-04 7:11 ` [PATCH v6 1/4] PCI: dwc: Rename 'dw_pcie::link_gen' to 'dw_pcie::max_link_speed' Manivannan Sadhasivam via B4 Relay
2024-09-04 9:21 ` Johan Hovold
2024-09-04 15:58 ` Frank Li
2024-09-04 16:12 ` Manivannan Sadhasivam
2024-09-05 8:36 ` kernel test robot
2024-09-05 16:11 ` kernel test robot
2024-09-04 7:11 ` [PATCH v6 2/4] PCI: dwc: Always cache the maximum link speed value in dw_pcie::max_link_speed Manivannan Sadhasivam via B4 Relay
2024-09-04 9:30 ` Johan Hovold
2024-09-04 15:49 ` Manivannan Sadhasivam
2024-09-05 6:45 ` Johan Hovold
2024-09-04 16:01 ` Frank Li
2024-09-04 7:11 ` [PATCH v6 3/4] PCI: qcom: Add equalization settings for 16.0 GT/s Manivannan Sadhasivam via B4 Relay
2024-09-04 9:39 ` Johan Hovold
2024-09-04 15:52 ` Manivannan Sadhasivam
2024-09-04 20:46 ` Shashank Babu Chinta Venkata
2024-09-05 6:50 ` Johan Hovold
2024-09-05 15:27 ` Manivannan Sadhasivam
2024-09-05 16:27 ` Johan Hovold [this message]
2024-09-05 17:34 ` Manivannan Sadhasivam
2024-09-06 6:49 ` Johan Hovold
2024-09-10 17:00 ` Manivannan Sadhasivam
2024-09-04 7:12 ` [PATCH v6 4/4] PCI: qcom: Add RX margining " Manivannan Sadhasivam via B4 Relay
2024-09-04 9:53 ` Johan Hovold
2024-09-04 16:04 ` Manivannan Sadhasivam
2024-09-04 20:48 ` Shashank Babu Chinta Venkata
2024-09-05 7:00 ` Johan Hovold
2024-09-04 9:56 ` [PATCH v6 0/4] PCI: qcom: Add 16.0 GT/s equalization and margining settings Johan Hovold
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