Re: [PATCH 1/2] PCI: dwc: Add L1ss context to ltssm_status of debugfs

[Shawn Lin <shawn.lin@rock-chips.com>]

在 2025/11/25 星期二 9:53, Shawn Lin 写道:
> dwc core couldn't distinguish ltssm status among L1.0, L1.1 and L1.2.
> But the variant driver may implement additional register to tell them
> apart. So this patch adds two pseudo definitions for variant drivers to
> transltae their internal L1 substates for debugfs to show.
> 

Gentle ping... :)

> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> ---
> This patch is based on latest pci controller/dwc branch given that L1ss support
> for Rockchip has been applied.
> 
>   drivers/pci/controller/dwc/pcie-designware-debugfs.c | 2 ++
>   drivers/pci/controller/dwc/pcie-designware.h         | 4 ++++
>   2 files changed, 6 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-debugfs.c b/drivers/pci/controller/dwc/pcie-designware-debugfs.c
> index 0fbf86c0b97e..df98fee69892 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-debugfs.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-debugfs.c
> @@ -485,6 +485,8 @@ static const char *ltssm_status_string(enum dw_pcie_ltssm ltssm)
>   	DW_PCIE_LTSSM_NAME(DW_PCIE_LTSSM_RCVRY_EQ1);
>   	DW_PCIE_LTSSM_NAME(DW_PCIE_LTSSM_RCVRY_EQ2);
>   	DW_PCIE_LTSSM_NAME(DW_PCIE_LTSSM_RCVRY_EQ3);
> +	DW_PCIE_LTSSM_NAME(DW_PCIE_LTSSM_L1_1);
> +	DW_PCIE_LTSSM_NAME(DW_PCIE_LTSSM_L1_2);
>   	default:
>   		str = "DW_PCIE_LTSSM_UNKNOWN";
>   		break;
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index d3dc0cd8e7b5..3f4611882e29 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -380,6 +380,10 @@ enum dw_pcie_ltssm {
>   	DW_PCIE_LTSSM_RCVRY_EQ2 = 0x22,
>   	DW_PCIE_LTSSM_RCVRY_EQ3 = 0x23,
>   
> +	/* Variant drivers provide pseudo L1 substates from get_ltssm()*/
> +	DW_PCIE_LTSSM_L1_1 = 0x141,
> +	DW_PCIE_LTSSM_L1_2 = 0x142,
> +
>   	DW_PCIE_LTSSM_UNKNOWN = 0xFFFFFFFF,
>   };
>