From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E0B8C433F5 for ; Sun, 17 Apr 2022 22:23:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234371AbiDQW0L (ORCPT ); Sun, 17 Apr 2022 18:26:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54078 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232635AbiDQW0K (ORCPT ); Sun, 17 Apr 2022 18:26:10 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E318812AA1; Sun, 17 Apr 2022 15:23:33 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: dmitry.osipenko) with ESMTPSA id 297C91F4437C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1650234211; bh=CcJUP4Ei7n9o+q3O09iFOiRFDYRHYPSFpc7uzXTjwqw=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=O+CzWC3I4DC8z3XM2IQbYer0jnYm0GvhGcfZaI0iAs8RYuy8ZZKxmNZRNJlkQw+tR mLrSXxk9//8YTKlDK0Uo1hu6/lKZNXJ/9TWeAO2WgI4+CaO55Poz7f7DFpMYm+KMx0 iqJoffXxpZ3U1RVWadGzX6M9vOvKus1Q6ULwn5UWqV6/pe62H4vuozPJG7rKQIwGcU O4k78HU2VqbQkbJuiVVb0IokIf85KaY9RgvVisIDOJJdo9my+Sw5qA4eEj9hOL7rdf sPUbEPtEYALhknm3kH+W5YF9V5AUAdlvnu/x5gynv7rGXgyyCNhbzr/ApLUBPX1UYg SDJtEV7s2Hl6w== Message-ID: Date: Mon, 18 Apr 2022 01:23:28 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH v6 3/4] arm64: dts: rockchip: add rk3568 pcie2x1 controller Content-Language: en-US To: Peter Geis Cc: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , "open list:ARM/Rockchip SoC..." , PCI , devicetree , arm-mail-list , Linux Kernel Mailing List References: <20220416100502.627289-1-pgwipeout@gmail.com> <20220416100502.627289-4-pgwipeout@gmail.com> From: Dmitry Osipenko In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On 4/16/22 13:17, Peter Geis wrote: > On Sat, Apr 16, 2022 at 6:08 AM Dmitry Osipenko > wrote: >> >> Hi Peter, >> >> On 4/16/22 13:05, Peter Geis wrote: >>> + pcie2x1: pcie@fe260000 { >>> + compatible = "rockchip,rk3568-pcie"; >>> + #address-cells = <3>; >>> + #size-cells = <2>; >>> + bus-range = <0x0 0xf>; >>> + assigned-clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>, >>> + <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>, >>> + <&cru CLK_PCIE20_AUX_NDFT>; >> >> Why these assigned-clocks are needed? I don't see anything assigned in >> this patchset. > > Ah, those are remnants of early bringup when performance wasn't good > and I was manually setting clock rates. If it's not needed, should it be removed then? Otherwise it looks like something is missing in the DT in regards to the assigned clocks.