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[169.61.105.92]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 4bqyukpeau-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 23 Jan 2026 13:06:05 +0000 (GMT) Received: from pps.filterd (ppma22.wdc07v.mail.ibm.com [127.0.0.1]) by ppma22.wdc07v.mail.ibm.com (8.18.1.2/8.18.1.2) with ESMTP id 60N9wsPZ016679; Fri, 23 Jan 2026 13:06:05 GMT Received: from smtprelay04.wdc07v.mail.ibm.com ([172.16.1.71]) by ppma22.wdc07v.mail.ibm.com (PPS) with ESMTPS id 4brn4yha3t-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 23 Jan 2026 13:06:05 +0000 Received: from smtpav02.dal12v.mail.ibm.com (smtpav02.dal12v.mail.ibm.com [10.241.53.101]) by smtprelay04.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 60ND64cB38732472 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 23 Jan 2026 13:06:05 GMT Received: from smtpav02.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 926D95805A; Fri, 23 Jan 2026 13:06:04 +0000 (GMT) Received: from smtpav02.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 415FE5805E; Fri, 23 Jan 2026 13:06:03 +0000 (GMT) Received: from [9.52.215.169] (unknown [9.52.215.169]) by smtpav02.dal12v.mail.ibm.com (Postfix) with ESMTP; Fri, 23 Jan 2026 13:06:03 +0000 (GMT) Message-ID: Subject: Re: [PATCH v3 1/2] PCI: Initialize RCB from pci_configure_device From: Niklas Schnelle To: =?ISO-8859-1?Q?H=E5kon?= Bugge , Bjorn Helgaas Cc: Alex Williamson , Johannes Thumshirn , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org In-Reply-To: <20260122130957.68757-2-haakon.bugge@oracle.com> References: <20260122130957.68757-1-haakon.bugge@oracle.com> <20260122130957.68757-2-haakon.bugge@oracle.com> Autocrypt: addr=schnelle@linux.ibm.com; prefer-encrypt=mutual; keydata=mQINBGHm3M8BEAC+MIQkfoPIAKdjjk84OSQ8erd2OICj98+GdhMQpIjHXn/RJdCZLa58k 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spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2601150000 definitions=main-2601230105 On Thu, 2026-01-22 at 14:09 +0100, H=C3=A5kon Bugge wrote: > Commit e42010d8207f ("PCI: Set Read Completion Boundary to 128 iff > Root Port supports it (_HPX)") fixed a bogus _HPX type 2 record, which > instructed program_hpx_type2() to set the RCB in an endpoint, > although it's RC did not have the RCB bit set. >=20 --- snip --- > =20 > +static bool pcie_read_root_rcb(struct pci_dev *dev, bool *rcb) > +{ > + struct pci_dev *rp =3D pcie_find_root_port(dev); > + u16 lnkctl; > + > + if (!rp) > + return false; > + > + pcie_capability_read_word(rp, PCI_EXP_LNKCTL, &lnkctl); > + > + *rcb =3D !!(lnkctl & PCI_EXP_LNKCTL_RCB); > + return true; > +} In principle this is one of these things where platforms like s390 where the root port is hidden (only s390?) might want a hook to use firmware supplied information to determine if the hidden root port supports the setting. I wonder if this would make sense as a __weak pcibios_read_rcb_supported() function. Not saying we need this now, just thinking out loud. > + > +static void pci_configure_rcb(struct pci_dev *dev) > +{ > + u16 lnkctl; > + bool rcb; > + > + /* > + * Per PCIe r7.0, sec 7.5.3.7, RCB is only meaningful in Root > + * Ports (where it is read-only), Endpoints, and Bridges. It > + * may only be set for Endpoints and Bridges if it is set in > + * the Root Port. For Endpoints, it is 'RsvdP' for Virtual > + * Functions. If the Root Port's RCB cannot be determined, we > + * bail out. > + */ > + if (!pci_is_pcie(dev) || > + pci_pcie_type(dev) =3D=3D PCI_EXP_TYPE_ROOT_PORT || > + pci_pcie_type(dev) =3D=3D PCI_EXP_TYPE_UPSTREAM || > + pci_pcie_type(dev) =3D=3D PCI_EXP_TYPE_DOWNSTREAM || > + pci_pcie_type(dev) =3D=3D PCI_EXP_TYPE_RC_EC || > + dev->is_virtfn || !pcie_read_root_rcb(dev, &rcb)) > + return; This solves the concern Bjorn had for hidden root ports in VMs and I confirmed that the check correctly bails on s390 even for PFs. Thanks! > + > + pcie_capability_read_word(dev, PCI_EXP_LNKCTL, &lnkctl); > + if (rcb) { > + if (lnkctl & PCI_EXP_LNKCTL_RCB) > + return; > + > + lnkctl |=3D PCI_EXP_LNKCTL_RCB; > + } else { > + if (!(lnkctl & PCI_EXP_LNKCTL_RCB)) > + return; > + > + pci_info(dev, FW_INFO "clearing RCB (RCB not set in Root Port)\n"); The FW_INFO in here seems to be a remnant from ACPI code. As far as I know this isn't usually used in core PCI code and seems conceptually misleading to me since this doesn't come out of ACPI or other firmware code. > + lnkctl &=3D ~PCI_EXP_LNKCTL_RCB; > + } > + > + pcie_capability_write_word(dev, PCI_EXP_LNKCTL, lnkctl); I do see Ilpo's point about pcie_capability_clear_and_set_word() and agree that it would look cleaner. For good measure I tested with that variant too and do prefer it, especially since it also gets rid of the lnkctl variable. On ther other hand the message might help identify weird firmware behavior. So no strong preference from my side. > +} > + > static void pci_configure_device(struct pci_dev *dev) > { > pci_configure_mps(dev); > @@ -2419,6 +2471,7 @@ static void pci_configure_device(struct pci_dev *de= v) > pci_configure_aspm_l1ss(dev); > pci_configure_eetlp_prefix(dev); > pci_configure_serr(dev); > + pci_configure_rcb(dev); > =20 > pci_acpi_program_hp_params(dev); > } I tested that this patch series does not create problems on s390 and would leave the RCB setting as is if our firmware set it. Since the second patch doesn't touch code that is build on s390 I think the Tested-by only makes sense for this one. So feel free to add my: Tested-by: Niklas Schnelle Furthermore with either the FW_INFO dropped or Ilpo's suggestion incorporated feel free to also add: Reviewed-by: Niklas Schnelle