From: Alyssa Rosenzweig <alyssa@rosenzweig.io>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
"Thomas Gleixner" <tglx@linutronix.de>,
"Andrew Lunn" <andrew@lunn.ch>,
"Gregory Clement" <gregory.clement@bootlin.com>,
"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Toan Le" <toan@os.amperecomputing.com>,
"Thierry Reding" <thierry.reding@gmail.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>
Subject: Re: [PATCH v2 7/9] PCI: apple: Convert to MSI parent infrastructure
Date: Tue, 13 May 2025 14:06:36 -0400 [thread overview]
Message-ID: <aCOKLCaU64JLbfKB@blossom> (raw)
In-Reply-To: <20250513172819.2216709-8-maz@kernel.org>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Le Tue , May 13, 2025 at 06:28:17PM +0100, Marc Zyngier a écrit :
> In an effort to move arm64 away from the legacy MSI setup,
> convert the apple PCIe driver to the MSI-parent infrastructure
> and let each device have its own MSI domain.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
> drivers/pci/controller/Kconfig | 1 +
> drivers/pci/controller/pcie-apple.c | 62 ++++++++++-------------------
> 2 files changed, 22 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig
> index 9800b76810540..98a62f4559dfd 100644
> --- a/drivers/pci/controller/Kconfig
> +++ b/drivers/pci/controller/Kconfig
> @@ -40,6 +40,7 @@ config PCIE_APPLE
> depends on OF
> depends on PCI_MSI
> select PCI_HOST_COMMON
> + select IRQ_MSI_LIB
> help
> Say Y here if you want to enable PCIe controller support on Apple
> system-on-chips, like the Apple M1. This is required for the USB
> diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c
> index 18e11b9a7f464..6c88b4dd34151 100644
> --- a/drivers/pci/controller/pcie-apple.c
> +++ b/drivers/pci/controller/pcie-apple.c
> @@ -22,6 +22,7 @@
> #include <linux/kernel.h>
> #include <linux/iopoll.h>
> #include <linux/irqchip/chained_irq.h>
> +#include <linux/irqchip/irq-msi-lib.h>
> #include <linux/irqdomain.h>
> #include <linux/list.h>
> #include <linux/module.h>
> @@ -133,7 +134,6 @@ struct apple_pcie {
> struct mutex lock;
> struct device *dev;
> void __iomem *base;
> - struct irq_domain *domain;
> unsigned long *bitmap;
> struct list_head ports;
> struct completion event;
> @@ -162,27 +162,6 @@ static void rmw_clear(u32 clr, void __iomem *addr)
> writel_relaxed(readl_relaxed(addr) & ~clr, addr);
> }
>
> -static void apple_msi_top_irq_mask(struct irq_data *d)
> -{
> - pci_msi_mask_irq(d);
> - irq_chip_mask_parent(d);
> -}
> -
> -static void apple_msi_top_irq_unmask(struct irq_data *d)
> -{
> - pci_msi_unmask_irq(d);
> - irq_chip_unmask_parent(d);
> -}
> -
> -static struct irq_chip apple_msi_top_chip = {
> - .name = "PCIe MSI",
> - .irq_mask = apple_msi_top_irq_mask,
> - .irq_unmask = apple_msi_top_irq_unmask,
> - .irq_eoi = irq_chip_eoi_parent,
> - .irq_set_affinity = irq_chip_set_affinity_parent,
> - .irq_set_type = irq_chip_set_type_parent,
> -};
> -
> static void apple_msi_compose_msg(struct irq_data *data, struct msi_msg *msg)
> {
> msg->address_hi = upper_32_bits(DOORBELL_ADDR);
> @@ -226,8 +205,7 @@ static int apple_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
>
> for (i = 0; i < nr_irqs; i++) {
> irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
> - &apple_msi_bottom_chip,
> - domain->host_data);
> + &apple_msi_bottom_chip, pcie);
> }
>
> return 0;
> @@ -251,12 +229,6 @@ static const struct irq_domain_ops apple_msi_domain_ops = {
> .free = apple_msi_domain_free,
> };
>
> -static struct msi_domain_info apple_msi_info = {
> - .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
> - MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX),
> - .chip = &apple_msi_top_chip,
> -};
> -
> static void apple_port_irq_mask(struct irq_data *data)
> {
> struct apple_pcie_port *port = irq_data_get_irq_chip_data(data);
> @@ -595,6 +567,18 @@ static int apple_pcie_setup_port(struct apple_pcie *pcie,
> return 0;
> }
>
> +static const struct msi_parent_ops apple_msi_parent_ops = {
> + .supported_flags = (MSI_GENERIC_FLAGS_MASK |
> + MSI_FLAG_PCI_MSIX |
> + MSI_FLAG_MULTI_PCI_MSI),
> + .required_flags = (MSI_FLAG_USE_DEF_DOM_OPS |
> + MSI_FLAG_USE_DEF_CHIP_OPS |
> + MSI_FLAG_PCI_MSI_MASK_PARENT),
> + .chip_flags = MSI_CHIP_FLAG_SET_EOI,
> + .bus_select_token = DOMAIN_BUS_PCI_MSI,
> + .init_dev_msi_info = msi_lib_init_dev_msi_info,
> +};
> +
> static int apple_msi_init(struct apple_pcie *pcie)
> {
> struct fwnode_handle *fwnode = dev_fwnode(pcie->dev);
> @@ -625,21 +609,17 @@ static int apple_msi_init(struct apple_pcie *pcie)
> return -ENXIO;
> }
>
> - parent = irq_domain_create_hierarchy(parent, 0, pcie->nvecs, fwnode,
> - &apple_msi_domain_ops, pcie);
> + parent = msi_create_parent_irq_domain(&(struct irq_domain_info){
> + .fwnode = fwnode,
> + .ops = &apple_msi_domain_ops,
> + .size = pcie->nvecs,
> + .host_data = pcie,
> + .parent = parent,
> + }, &apple_msi_parent_ops);
> if (!parent) {
> dev_err(pcie->dev, "failed to create IRQ domain\n");
> return -ENOMEM;
> }
> - irq_domain_update_bus_token(parent, DOMAIN_BUS_NEXUS);
> -
> - pcie->domain = pci_msi_create_irq_domain(fwnode, &apple_msi_info,
> - parent);
> - if (!pcie->domain) {
> - dev_err(pcie->dev, "failed to create MSI domain\n");
> - irq_domain_remove(parent);
> - return -ENOMEM;
> - }
>
> return 0;
> }
> --
> 2.39.2
>
next prev parent reply other threads:[~2025-05-13 18:06 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-13 17:28 [PATCH v2 0/9] irqchip: MSI parent cleanup and PCI host driver conversion Marc Zyngier
2025-05-13 17:28 ` [PATCH v2 1/9] irqchip: Make irq-msi-lib.h globally available Marc Zyngier
2025-05-13 17:28 ` [PATCH v2 2/9] genirq/msi: Add helper for creating MSI-parent irq domains Marc Zyngier
2025-05-13 17:28 ` [PATCH v2 3/9] irqchip/gic: Convert to msi_create_parent_irq_domain() helper Marc Zyngier
2025-05-16 10:36 ` Thomas Gleixner
2025-05-16 10:47 ` Marc Zyngier
2025-05-16 10:55 ` Thomas Gleixner
2025-05-13 17:28 ` [PATCH v2 4/9] irqchip/mvebu: " Marc Zyngier
2025-05-13 17:28 ` [PATCH v2 5/9] irqchip: Drop MSI_CHIP_FLAG_SET_ACK from unsuspecting MSI drivers Marc Zyngier
2025-05-13 17:28 ` [PATCH v2 6/9] irqchip/msi-lib: Honour the MSI_FLAG_NO_AFFINITY flag Marc Zyngier
2025-05-13 17:28 ` [PATCH v2 7/9] PCI: apple: Convert to MSI parent infrastructure Marc Zyngier
2025-05-13 18:06 ` Alyssa Rosenzweig [this message]
2025-05-13 17:28 ` [PATCH v2 8/9] PCI: xgene: " Marc Zyngier
2025-05-13 17:28 ` [PATCH v2 9/9] PCI: tegra: " Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aCOKLCaU64JLbfKB@blossom \
--to=alyssa@rosenzweig.io \
--cc=andrew@lunn.ch \
--cc=bhelgaas@google.com \
--cc=gregory.clement@bootlin.com \
--cc=jonathanh@nvidia.com \
--cc=kw@linux.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=manivannan.sadhasivam@linaro.org \
--cc=maz@kernel.org \
--cc=sebastian.hesselbarth@gmail.com \
--cc=tglx@linutronix.de \
--cc=thierry.reding@gmail.com \
--cc=toan@os.amperecomputing.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).