From: Geraldo Nascimento <geraldogabriel@gmail.com>
To: Robin Murphy <robin.murphy@arm.com>
Cc: linux-rockchip@lists.infradead.org,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Vinod Koul" <vkoul@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Rick wertenbroek" <rick.wertenbroek@gmail.com>,
linux-phy@lists.infradead.org, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH v5 3/4] phy: rockchip-pcie: Enable all four lanes
Date: Fri, 20 Jun 2025 09:50:01 -0300 [thread overview]
Message-ID: <aFVY-YtSTxUpJkIa@geday> (raw)
In-Reply-To: <aFVTdYWxuq9YzVQR@geday>
On Fri, Jun 20, 2025 at 09:26:36AM -0300, Geraldo Nascimento wrote:
> On Fri, Jun 20, 2025 at 01:04:46PM +0100, Robin Murphy wrote:
> > On 2025-06-13 6:03 pm, Geraldo Nascimento wrote:
> > > Current code enables only Lane 0 because pwr_cnt will be incremented
> > > on first call to the function. Use for-loop to enable all 4 lanes
> > > through GRF.
> >
> > If this was really necessary, then surely it would also need the
> > equivalent changes in rockchip_pcie_phy_power_off() too?
> >
> > However, I'm not sure it *is* necessary - the NVMe on my RK3399 board
> > happily claims to be using an x4 link, so I stuck a print of inst->index
> > in this function, and sure enough I do see it being called for each
> > instance already:
> >
> > [ 1.737479] phy phy-ff770000.syscon:pcie-phy.1: power_on 0
> > [ 1.738810] phy phy-ff770000.syscon:pcie-phy.2: power_on 1
> > [ 1.745193] phy phy-ff770000.syscon:pcie-phy.3: power_on 2
> > [ 1.745196] phy phy-ff770000.syscon:pcie-phy.4: power_on 3
> >
>
> Hi Robin, and thanks for caring, it's excellent to rely on your
> extensive expertise on ARM in general and RK3399 specifically!
>
> However, on my board I'm positive it does not work without proposed
> patch and I get stuck with x1 link without it.
>
> There are currently very similar patches applied downstream to Armbian
> and OpenWRT so at least I'm confident that is not only my board which is
> quirky and other people experienced the same problem.
>
> Thanks,
> Geraldo Nascimento
Hello again Robin,
for reference, here's the commit for OpenWRT, originally from Armbian:
https://github.com/openwrt/openwrt/commit/2dc9801fe81ab3c092d2ca75e4c63f8d5eea46f5
Please note that the author of that commit specifically mentions a warm
reboot is needed to trigger the "stuck on x1" behavior. That author took
a different strategy than me, just reordering instead of using for-loop.
I'm open for different strategies, but the report is real I assure you.
Geraldo Nascimento
>
> > Thanks,
> > Robin.
next prev parent reply other threads:[~2025-06-20 12:50 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-13 17:03 [RFC PATCH v5 0/4] PCI: rockchip: Improve driver quality Geraldo Nascimento
2025-06-13 17:03 ` [RFC PATCH v5 1/4] PCI: rockchip: Use standard PCIe defines Geraldo Nascimento
2025-06-13 17:03 ` [RFC PATCH v5 2/4] PCI: rockchip: Set Target Link Speed before retraining Geraldo Nascimento
2025-06-13 18:06 ` Geraldo Nascimento
2025-06-20 12:33 ` Robin Murphy
2025-06-20 12:43 ` Geraldo Nascimento
2025-06-13 17:03 ` [RFC PATCH v5 3/4] phy: rockchip-pcie: Enable all four lanes Geraldo Nascimento
2025-06-20 12:04 ` Robin Murphy
2025-06-20 12:26 ` Geraldo Nascimento
2025-06-20 12:47 ` Robin Murphy
2025-06-20 13:00 ` Geraldo Nascimento
2025-06-20 12:50 ` Geraldo Nascimento [this message]
2025-06-13 17:04 ` [RFC PATCH v5 4/4] phy: rockchip-pcie: Adjust read mask and write Geraldo Nascimento
2025-06-20 14:19 ` Robin Murphy
2025-06-20 15:23 ` Geraldo Nascimento
2025-06-20 18:35 ` Geraldo Nascimento
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