From: Niklas Cassel <cassel@kernel.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: "Manivannan Sadhasivam" <mani@kernel.org>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Wilfred Mallawa" <wilfred.mallawa@wdc.com>,
"Damien Le Moal" <dlemoal@kernel.org>,
"Laszlo Fiat" <laszlo.fiat@proton.me>,
linux-pci@vger.kernel.org
Subject: Re: [PATCH v4 5/7] PCI: dwc: Ensure that dw_pcie_wait_for_link() waits 100 ms after link up
Date: Wed, 2 Jul 2025 11:43:11 +0200 [thread overview]
Message-ID: <aGT_L_hglVBP6yzB@ryzen> (raw)
In-Reply-To: <20250701163844.GA1836602@bhelgaas>
On Tue, Jul 01, 2025 at 11:38:44AM -0500, Bjorn Helgaas wrote:
> >
> > No. The PERST# delay should be handled by the glue drivers since
> > they are the ones controlling the PERST# line. Doing an
> > unconditional wait for both the cases in DWC core, seems wrong to
> > me.
>
> It ends up being a little bit weird that the delay is in the DWC core
> (dw_pcie_wait_for_link()) for ports that support fast links, and in
> the glue drivers otherwise. It would be easier to verify and maintain
> if the delay were always in the DWC core.
>
> If we had a dw_pcie_host_ops callback for PERST# deassertion, the
> delay could be in the DWC core, but I don't know if there's enough
> consistency across drivers for that to be practical.
Currently, there is not much consistency between the glue drivers, so
adding a DWC core API to assert/deassert PERST# sounds like a good idea
to me. The callback could even be supplied a struct gpio_desc pointer.
Like I mentioned in my previous email:
https://github.com/torvalds/linux/blob/v6.16-rc4/drivers/pci/controller/dwc/pci-imx6.c#L885
https://github.com/torvalds/linux/blob/v6.16-rc4/drivers/pci/controller/dwc/pcie-qcom.c#L294
https://github.com/torvalds/linux/blob/v6.16-rc4/drivers/pci/controller/dwc/pcie-keembay.c#L89
these drivers seem to have a 100 ms delay after PERST# has been deasserted,
but there are of course more glue drivers, so a lot of them will not have a
100 ms wait _after_ PERST# is deasserted. (All glue drivers seem to have a
delay between asserting and deasserting PERST#.)
Right now, e.g. qcom will have a 100 ms delay both after deasserting PERST#
and after link up. (However, based on the supported link speed, only one of
the delays should be needed.)
However, my main concern is not that qcom waits twice, it is those drivers
that do not have a 100 ms delay after PERST# has been deasserted, because
before commit 470f10f18b48 ("PCI: Reduce PCIE_LINK_WAIT_SLEEP_MS"), those
drivers might have been "saved" by the ridiculously long
PCIE_LINK_WAIT_SLEEP_MS.
However, now when we sleep less in each iteration when polling for link up,
those drivers that do not have a 100 ms delay after PERST# has been
deasserted might actually see regressions, because (the now reduced)
PCIE_LINK_WAIT_SLEEP_MS time is no longer "saving" them.
If we don't want to make the PCIE_RESET_CONFIG_WAIT_MS wait unconditional
(not care about the supported link speed), then perhaps we should drop
470f10f18b48 ("PCI: Reduce PCIE_LINK_WAIT_SLEEP_MS") from pci/next ?
Kind regards,
Niklas
next prev parent reply other threads:[~2025-07-02 9:43 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-25 10:23 [PATCH v4 0/7] PCI: dwc: Do not enumerate bus before endpoint devices are ready Niklas Cassel
2025-06-25 10:23 ` [PATCH v4 1/7] PCI: Rename PCIE_RESET_CONFIG_DEVICE_WAIT_MS to PCIE_RESET_CONFIG_WAIT_MS Niklas Cassel
2025-06-25 10:23 ` [PATCH v4 2/7] PCI: rockchip-host: Use macro PCIE_RESET_CONFIG_WAIT_MS Niklas Cassel
2025-06-25 10:23 ` [PATCH v4 3/7] PCI: dw-rockchip: Wait PCIE_RESET_CONFIG_WAIT_MS after link-up IRQ Niklas Cassel
2025-06-25 10:23 ` [PATCH v4 4/7] PCI: qcom: " Niklas Cassel
2025-06-25 10:23 ` [PATCH v4 5/7] PCI: dwc: Ensure that dw_pcie_wait_for_link() waits 100 ms after link up Niklas Cassel
2025-06-30 20:19 ` Bjorn Helgaas
2025-07-01 11:55 ` Niklas Cassel
2025-07-01 13:01 ` Manivannan Sadhasivam
2025-07-01 16:38 ` Bjorn Helgaas
2025-07-02 9:43 ` Niklas Cassel [this message]
2025-07-02 14:47 ` Manivannan Sadhasivam
2025-07-02 16:17 ` Niklas Cassel
2025-07-07 7:48 ` Manivannan Sadhasivam
2025-07-07 11:56 ` Niklas Cassel
2025-07-08 7:49 ` Manivannan Sadhasivam
2025-07-07 23:01 ` Bjorn Helgaas
2025-06-25 10:23 ` [PATCH v4 6/7] PCI: Move link up wait time and max retries macros to pci.h Niklas Cassel
2025-06-25 10:23 ` [PATCH v4 7/7] PCI: Reduce PCIE_LINK_WAIT_SLEEP_MS Niklas Cassel
2025-06-25 13:29 ` [PATCH v4 0/7] PCI: dwc: Do not enumerate bus before endpoint devices are ready Manivannan Sadhasivam
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