Re: Does dwc/pci-layerscape.c support AER?

[Brian Norris <briannorris@chromium.org>]

Hi Frank,

On Wed, Jul 02, 2025 at 07:09:42PM -0400, Frank Li wrote:
> > Does the AER driver actually work on these platforms?
...
> There are several attempts to upstream customer Aer irq support in past years.
> 
> For example:
>   https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1161848.html
> 
> some change port drivers.
> 
> If you think it is valuable to support customer AER IRQ support, I can restart
> this work.

Interesting thread. I read through it, but I'm still not convinced about
one detail:

Are you sure that AER can't possibly work over MSI? Even today, the
Synopsys manuals say that their integrated MSI receiver "terminate[s]
inbound MSI requests (received on the RX wire)" and after terminating,
"an interrupt is signaled locally through the msi_ctrl_int output."

That means that their msi_ctrl_int signal only handles MSI requests from
downstream functions, and it implies that the default
drivers/pci/controller/dwc/pcie-designware-host.c
dw_pcie_msi_domain_info implementation will not actually see MSIs from
the root port (such as PME and AER). So yes, it *appears* that AER does
not work over MSI.

But crucially, it does *not* mean that the port will not generate valid
MSI requests, if you have some kind of logic that will receive it. So
for instance, I pointed out in another reply that some SoCs choose to
hook up GIC ITS:

 commit 9c4cd0aef259 ("arm64: dts: qcom: x1e80100: enable GICv3 ITS for
 PCIe")

"""
    Note that using the GIC ITS on x1e80100 will cause Advanced Error
    Reporting (AER) interrupts to be received on errors unlike when using
    the internal MSI controller. Consequently, notifications about
    (correctable) errors may now be logged for errors that previously went
    unnoticed.
"""

And in fact, your arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi seems
to be doing the same. I'd be surprised if these port MSIs still don't
work after that.

OTOH, I do also believe there are SoCs where DWC PCIe is available, but
there is no external MSI controller, and so that same problem still may
exist. I may even have such SoCs available...

Brian