Re: [RFC PATCH 2/2] PCI: rockchip-host: drop wait on PERST# toggle

Diederik de Haas
2025-11-05T09:07:11Z

On Wed Nov 5, 2025 at 4:55 AM CET, Geraldo Nascimento wrote:
> On Mon, Nov 03, 2025 at 12:10:38PM -0600, Bjorn Helgaas wrote:
>> On Mon, Nov 03, 2025 at 03:27:25AM -0300, Geraldo Nascimento wrote:
>> > With this change PCIe will complete link-training with a known quirky
>> > device - Samsung OEM PM981a SSD. This is completely against the PCIe
>
> Something in my intuition kept telling me this was PERST# related,
> and so I followed that rabbit-hole.
>
> It seems the following change will allow the SSD to work with the
> Rockchip-IP PCIe core without any other changes. So it is purely
> a DT change and we are able to keep the mandatory 100ms delay
> after driving PERST# low, as well as the always-on/boot-on
> properties of the 3v3 power regulator.
>
> This time everything is within the PCIe spec AFAICT, PERST# indeed
> is an Open Drain signal, and indeed it does requires pull-up resistor
> to maintain the drive after driving it high.
>
> I'm still testing the overall stability of this, let's hope for the
> best!

I have a Samsung PM981 (without the 'a') and AFAICT it works fine.
I had noticed that the PERST# (pinctrl) was missing, but 'ep-gpios'
was/is new to me and I hadn't had time to research that properly yet.
Good to see you already found it yourself :-)

Cheers,
Diederik

> diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
> index aa70776e898a..1c5afc0413bc 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
> @@ -383,13 +383,14 @@ &pcie_phy {
> };
>
> &pcie0 {
> - ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
> + ep-gpios = <&gpio0 RK_PB4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> num-lanes = <4>;
> - pinctrl-0 = <&pcie_clkreqnb_cpm>;
> + pinctrl-0 = <&pcie_clkreqnb_cpm>, <&pcie_perst>;
> pinctrl-names = "default";
> vpcie0v9-supply = <&vcca_0v9>; /* VCC_0V9_S0 */
> vpcie1v8-supply = <&vcca_1v8>; /* VCC_1V8_S0 */
> vpcie3v3-supply = <&vcc3v3_pcie>;
> + max-link-speed = <2>;
> status = "okay";
> };
>
> @@ -408,6 +409,10 @@ pcie {
> pcie_pwr: pcie-pwr {
> rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
> };
> + pcie_perst: pcie-perst {
> + rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> +
> };
>
> pmic {
>