From: Lukas Wunner <lukas@wunner.de>
To: Johnny Chang <Johnny-CC.Chang@mediatek.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
Project_Global_Digits_Upstream_Group@mediatek.com
Subject: Re: [PATCH] PCI: Mark Nvidia GB10 to avoid bus reset
Date: Thu, 13 Nov 2025 10:39:44 +0100 [thread overview]
Message-ID: <aRWnYCI6Ax14XNJq@wunner.de> (raw)
In-Reply-To: <20251113084441.2124737-1-Johnny-CC.Chang@mediatek.com>
On Thu, Nov 13, 2025 at 04:44:06PM +0800, Johnny Chang wrote:
> Nvidia GB10 PCIe hosts will encounter problem occasionally
> after SBR(secondary bus reset) is applied.
Could you elaborate what kinds of problems occur, how often they occur, etc?
Thanks,
Lukas
next prev parent reply other threads:[~2025-11-13 9:39 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-13 8:44 [PATCH] PCI: Mark Nvidia GB10 to avoid bus reset Johnny Chang
2025-11-13 9:39 ` Lukas Wunner [this message]
2025-11-18 9:39 ` Johnny-CC Chang (張晋嘉)
2026-01-14 6:39 ` Johnny-CC Chang (張晋嘉)
2026-01-14 17:28 ` Bjorn Helgaas
2026-01-15 20:11 ` Terje Bergstrom
2026-01-15 20:53 ` Bjorn Helgaas
2026-01-15 21:55 ` Terje Bergstrom
2026-01-15 22:11 ` Bjorn Helgaas
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