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From: Lukas Wunner <lukas@wunner.de>
To: Atharva Tiwari <atharvatiwarilinuxdev@gmail.com>
Cc: Mahesh J Salgaonkar <mahesh@linux.ibm.com>,
	Oliver O'Halloran <oohall@gmail.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Kuppuswamy Sathyanarayanan
	<sathyanarayanan.kuppuswamy@linux.intel.com>,
	Giovanni Cabiddu <giovanni.cabiddu@intel.com>,
	Feng Tang <feng.tang@linux.alibaba.com>,
	linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] PCI/portdev: Disable AER for Titan Ridge 4C 2018
Date: Wed, 7 Jan 2026 10:56:24 +0100	[thread overview]
Message-ID: <aV4tyKPGioCqXTRr@wunner.de> (raw)
In-Reply-To: <20260107081445.1100-1-atharvatiwarilinuxdev@gmail.com>

On Wed, Jan 07, 2026 at 08:14:35AM +0000, Atharva Tiwari wrote:
> Changes since v1:
> 	Transferred logic to drivers/pci/quicks.c

This should go below the line with the three dashes
so that it's not included in the commit when the patch
is applied to the maintainer's git tree.

> Disable AER for Intel Titan Ridge 4C 2018
> (used in T2 iMacs, where the warnings appear)
> that generate continuous pcieport warnings. such as:
> 
> pcieport 0000:00:1c.4: AER: Correctable error message received from 0000:07:00.0
> pcieport 0000:07:00.0: PCIe Bus Error: severity=Correctable, type=Data Link Layer, (Receiver ID)
> pcieport 0000:07:00.0:   device [8086:15ea] error status/mask=00000080/00002000
> pcieport 0000:07:00.0:    [ 7] BadDLLP
> 
> (see: https://bugzilla.kernel.org/show_bug.cgi?id=220651)

Use a Link: or Closes: tag for the bugzilla URL.

> macOS also disables AER for Thunderbolt devices and controllers in their drivers.

Could you provide a link to the xnu source code
so that we can double-check what they're doing and why?

> +++ b/drivers/pci/quirks.c
> @@ -6340,4 +6340,13 @@ static void pci_mask_replay_timer_timeout(struct pci_dev *pdev)
>  }
>  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9750, pci_mask_replay_timer_timeout);
>  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9755, pci_mask_replay_timer_timeout);
> +
> +static void pci_disable_aer(struct pci_dev *pdev)
> +{
> +	pdev->no_aer = 1;
> +}
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15EA, pci_disable_aer);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15EB, pci_disable_aer);
> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15EC, pci_disable_aer);
> +

This will disable AER on all arches for all users, yet you've claimed
that the issue is confined to T2 Macs and caused by their firmware.

The proper approach would be to move this quirk to arch/x86/pci/fixups.c
so that it's not compiled on other arches.  Moreover you need a DMI check
to constrain this to T2 Macs so that AER stays enabled on other machines.

Since this is a discrete Thunderbolt controller, it is important to cc
Thunderbolt maintainers to get their feedback, yet your v2 patch wasn't
cc'ed to them.  Please be sure to include them in any follow-up submissions.

Thanks,

Lukas

  parent reply	other threads:[~2026-01-07  9:56 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-07  8:14 [PATCH v2] PCI/portdev: Disable AER for Titan Ridge 4C 2018 Atharva Tiwari
2026-01-07  9:21 ` Manivannan Sadhasivam
2026-01-07  9:56 ` Lukas Wunner [this message]
2026-01-07 11:43   ` Atharva Tiwari

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