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Sun, 28 Dec 2025 03:08:35 -0800 (PST) Received: from archie.me ([210.87.74.117]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4324eab2c4fsm56594647f8f.42.2025.12.28.03.08.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 28 Dec 2025 03:08:33 -0800 (PST) Received: by archie.me (Postfix, from userid 1000) id 79020423BCD3; Sun, 28 Dec 2025 18:08:28 +0700 (WIB) Date: Sun, 28 Dec 2025 18:08:26 +0700 From: Bagas Sanjaya To: Shawn Lin , Bjorn Helgaas Cc: linux-pci@vger.kernel.org, linux-doc@vger.kernel.org Subject: Re: [PATCH] Documentation: PCI: Fix typos in msi-howto.rst Message-ID: References: <1766713528-173281-1-git-send-email-shawn.lin@rock-chips.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="FjI6l/WwqEYPyDvt" Content-Disposition: inline In-Reply-To: <1766713528-173281-1-git-send-email-shawn.lin@rock-chips.com> --FjI6l/WwqEYPyDvt Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Dec 26, 2025 at 09:45:28AM +0800, Shawn Lin wrote: > diff --git a/Documentation/PCI/msi-howto.rst b/Documentation/PCI/msi-howt= o.rst > index 0692c9a..667ebe2 100644 > --- a/Documentation/PCI/msi-howto.rst > +++ b/Documentation/PCI/msi-howto.rst > @@ -98,7 +98,7 @@ function:: > =20 > which allocates up to max_vecs interrupt vectors for a PCI device. It > returns the number of vectors allocated or a negative error. If the dev= ice > -has a requirements for a minimum number of vectors the driver can pass a > +has a requirement for a minimum number of vectors the driver can pass a > min_vecs argument set to this limit, and the PCI core will return -ENOSPC > if it can't meet the minimum number of vectors. > =20 > @@ -127,7 +127,7 @@ not be able to allocate as many vectors for MSI as it= could for MSI-X. On > some platforms, MSI interrupts must all be targeted at the same set of C= PUs > whereas MSI-X interrupts can all be targeted at different CPUs. > =20 > -If a device supports neither MSI-X or MSI it will fall back to a single > +If a device supports neither MSI-X nor MSI it will fall back to a single > legacy IRQ vector. > =20 > The typical usage of MSI or MSI-X interrupts is to allocate as many vect= ors > @@ -203,7 +203,7 @@ How to tell whether MSI/MSI-X is enabled on a device > ---------------------------------------------------- > =20 > Using 'lspci -v' (as root) may show some devices with "MSI", "Message > -Signalled Interrupts" or "MSI-X" capabilities. Each of these capabiliti= es > +Signaled Interrupts" or "MSI-X" capabilities. Each of these capabilities > has an 'Enable' flag which is followed with either "+" (enabled) > or "-" (disabled). > =20 Looks good, thanks! Reviewed-by: Bagas Sanjaya --=20 An old man doll... just what I always wanted! - Clara --FjI6l/WwqEYPyDvt Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQSSYQ6Cy7oyFNCHrUH2uYlJVVFOowUCaVEPpAAKCRD2uYlJVVFO o8lxAPwOS2gp+wMNFQsULo4GT2mhXQu2EEUIBZQ7xt1v6f2uhwEA32tjq4P8Umk9 Bbnv9R0cS3jGwDpxhm+zF3mOlMPvcAU= =DW07 -----END PGP SIGNATURE----- --FjI6l/WwqEYPyDvt--