Re: [PATCH RESEND v10 2/2] dmaengine: dw-edma: Add non-LL mode

[Frank Li <Frank.li@nxp.com>]

On Mon, Feb 23, 2026 at 04:40:07PM +0000, Verma, Devendra wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> > -----Original Message-----
> > From: Frank Li <Frank.li@nxp.com>
> > Sent: Friday, February 20, 2026 9:33 PM
> > To: Verma, Devendra <Devendra.Verma@amd.com>
> > Cc: bhelgaas@google.com; mani@kernel.org; vkoul@kernel.org;
> > dmaengine@vger.kernel.org; linux-pci@vger.kernel.org; linux-
> > kernel@vger.kernel.org; Simek, Michal <michal.simek@amd.com>
> > Subject: Re: [PATCH RESEND v10 2/2] dmaengine: dw-edma: Add non-LL
> > mode
> >
...
> > > But if it about writing a new function to check the LL mode support
> > > then I think the current variable is good enough which provides good
> > > readability and do not create any ambiguity compared to the ll region size
> > comparison.
> >
> > It is not big deal,  use 'bool cap_non_ll: 1' in dw_edma_chip. So we add more
> > cap flags in future.
> >
> > Frank
> >
>
> Hi Frank, could you elaborate what you mean by adding the cap flag? How it is going
> To help identify the overall chip state?
> I do not understand what is being implied here.

non_ll in chan means current status, which indicate one channel work at
non_ll mode or ll mode.

here dw_edma_chip means hardware's captiblity, indicate if hardware support
ll mode.

Distingiush hardware limition or current working mode.

Frank
>
> - Regards,
> Devendra
>
> > >
> > > > Frank
> > > > >
> > > > > > >
> > > > > > > > > >
> > > > > > > > > > Frank
> > > > > > > > > > >  };
> > > > > > > > > > >
> > > > > > > > > > >  /* Export to the platform drivers */
> > > > > > > > > > > --
> > > > > > > > > > > 2.43.0
> > > > > > > > > > >