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From: Niklas Cassel <cassel@kernel.org>
To: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Cc: "Frank Li" <Frank.li@nxp.com>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Arnd Bergmann" <arnd@arndb.de>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Koichiro Den" <den@valinux.co.jp>,
	"Damien Le Moal" <dlemoal@kernel.org>,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH 8/9] misc: pci_endpoint_test: Give reserved BARs a distinct error code
Date: Wed, 25 Feb 2026 16:46:11 +0100	[thread overview]
Message-ID: <aZ8ZQzmY37CV5R9d@ryzen> (raw)
In-Reply-To: <a8151b84-d312-4cc0-92b1-55afcc89fd37@nvidia.com>

On Mon, Feb 23, 2026 at 10:30:39AM +0530, Manikanta Maddireddy wrote:
> 
> On 18/02/26 4:14 pm, Niklas Cassel wrote:
> > On Tue, Feb 17, 2026 at 06:07:30PM -0500, Frank Li wrote:
> > > On Tue, Feb 17, 2026 at 10:27:14PM +0100, Niklas Cassel wrote:
> > > > Give reserved BARs a distinct error code, such that the pci_endpoint_test
> > > > selftest will be able to skip test cases that are run against reserved
> > > > BARs.
> > > > 
> > > > Signed-off-by: Niklas Cassel <cassel@kernel.org>
> Tested by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> > > > ---
> > > >   drivers/misc/pci_endpoint_test.c | 32 ++++++++++++++++++++++++++++++--
> > > >   1 file changed, 30 insertions(+), 2 deletions(-)
> > > > 
> > > > diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c
> > > > index 74ab5b5b9011..7cffb6e77c4d 100644
> > > > --- a/drivers/misc/pci_endpoint_test.c
> > > > +++ b/drivers/misc/pci_endpoint_test.c
> > > > @@ -84,6 +84,12 @@
> > > >   #define CAP_MSIX				BIT(2)
> > > >   #define CAP_INTX				BIT(3)
> > > >   #define CAP_SUBRANGE_MAPPING			BIT(4)
> > > > +#define CAP_BAR0_RESERVED			BIT(5)
> > > > +#define CAP_BAR1_RESERVED			BIT(6)
> > > > +#define CAP_BAR2_RESERVED			BIT(7)
> > > > +#define CAP_BAR3_RESERVED			BIT(8)
> > > > +#define CAP_BAR4_RESERVED			BIT(9)
> > > > +#define CAP_BAR5_RESERVED			BIT(10)
> > > > 
> > > >   #define PCI_ENDPOINT_TEST_DB_BAR		0x34
> > > >   #define PCI_ENDPOINT_TEST_DB_OFFSET		0x38
> > > > @@ -275,6 +281,23 @@ static int pci_endpoint_test_request_irq(struct pci_endpoint_test *test)
> > > >   	return ret;
> > > >   }
> > > > 
> > > > +static bool bar_is_reserved(struct pci_endpoint_test *test, enum pci_barno bar)
> > > > +{
> > > > +	if (bar == BAR_0 && test->ep_caps & CAP_BAR0_RESERVED)
> > > > +		return true;
> > > > +	else if (bar == BAR_1 && test->ep_caps & CAP_BAR1_RESERVED)
> > > > +		return true;
> > > > +	else if (bar == BAR_2 && test->ep_caps & CAP_BAR2_RESERVED)
> > > > +		return true;
> > > > +	else if (bar == BAR_3 && test->ep_caps & CAP_BAR3_RESERVED)
> > > > +		return true;
> > > > +	else if (bar == BAR_4 && test->ep_caps & CAP_BAR4_RESERVED)
> > > > +		return true;
> > > > +	else if (bar == BAR_5 && test->ep_caps & CAP_BAR5_RESERVED)
> > > > +		return true;
> > > 
> > > return	test->ep_caps & BIT(bar + CAP_BAR0_RESERVED)
> I think it should be
> return !!(test->ep_caps & BIT(bar + CAP_BAR0_RESERVED))

I don't think !! is needed:

"When any scalar value is converted to _Bool, the result is 0 if the value
compares equal to 0; otherwise, the result is 1."


Kind regards,
Niklas

  reply	other threads:[~2026-02-25 15:46 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-17 21:27 [PATCH 0/9] PCI: endpoint differentiate between disabled and reserved BARs Niklas Cassel
2026-02-17 21:27 ` [PATCH 1/9] PCI: endpoint: Introduce pci_epc_bar_type BAR_64BIT_UPPER Niklas Cassel
2026-02-17 21:57   ` Frank Li
     [not found]     ` <81af7f88-b9c1-457f-9a21-a7b15a13d374@nvidia.com>
2026-02-23 10:14       ` Geert Uytterhoeven
2026-02-24 13:54         ` Manikanta Maddireddy
2026-02-17 21:27 ` [PATCH 2/9] PCI: endpoint: Describe reserved subregions within BARs Niklas Cassel
2026-02-23  4:06   ` Manikanta Maddireddy
2026-02-17 21:27 ` [PATCH 3/9] PCI: dw-rockchip: Describe RK3588 BAR4 DMA ctrl window Niklas Cassel
2026-02-23  4:10   ` Manikanta Maddireddy
2026-02-17 21:27 ` [PATCH 4/9] PCI: endpoint: Introduce pci_epc_bar_type BAR_DISABLED Niklas Cassel
2026-02-17 22:03   ` Frank Li
2026-02-18 10:33     ` Niklas Cassel
2026-02-18 16:01       ` Frank Li
2026-02-23  4:17     ` Manikanta Maddireddy
2026-02-17 21:27 ` [PATCH 5/9] PCI: dwc: Replace BAR_RESERVED with BAR_DISABLED in glue drivers Niklas Cassel
2026-02-17 22:15   ` Frank Li
2026-02-23  4:46     ` Manikanta Maddireddy
2026-02-25 14:56       ` Niklas Cassel
2026-02-17 21:27 ` [PATCH 6/9] PCI: dwc: Disable BARs in common code instead of in each glue driver Niklas Cassel
2026-02-17 23:00   ` Frank Li
2026-02-17 21:27 ` [PATCH 7/9] PCI: endpoint: pci-epf-test: Advertise reserved BARs Niklas Cassel
2026-02-17 23:02   ` Frank Li
2026-02-18 10:43     ` Niklas Cassel
2026-02-18 16:00       ` Frank Li
2026-02-19  9:35         ` Niklas Cassel
2026-02-19 17:12           ` Frank Li
2026-02-23  4:57             ` Manikanta Maddireddy
2026-02-17 21:27 ` [PATCH 8/9] misc: pci_endpoint_test: Give reserved BARs a distinct error code Niklas Cassel
2026-02-17 21:45   ` Niklas Cassel
2026-02-17 23:07   ` Frank Li
2026-02-18 10:44     ` Niklas Cassel
2026-02-23  5:00       ` Manikanta Maddireddy
2026-02-25 15:46         ` Niklas Cassel [this message]
2026-02-17 21:27 ` [PATCH 9/9] selftests: pci_endpoint: Skip reserved BARs Niklas Cassel
2026-02-17 23:11   ` Frank Li
2026-02-23  5:03     ` Manikanta Maddireddy
2026-02-23  3:49 ` [PATCH 0/9] PCI: endpoint differentiate between disabled and " Manikanta Maddireddy

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