From: Frank Li <Frank.li@nxp.com>
To: Niklas Cassel <cassel@kernel.org>
Cc: "Manivannan Sadhasivam" <mani@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Manikanta Maddireddy" <mmaddireddy@nvidia.com>,
"Koichiro Den" <den@valinux.co.jp>,
"Damien Le Moal" <dlemoal@kernel.org>,
linux-pci@vger.kernel.org
Subject: Re: [PATCH 7/9] PCI: endpoint: pci-epf-test: Advertise reserved BARs
Date: Wed, 18 Feb 2026 11:00:17 -0500 [thread overview]
Message-ID: <aZXiEWmNEdCfXse2@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <aZWXzzul8xRaDQgm@ryzen>
On Wed, Feb 18, 2026 at 11:43:27AM +0100, Niklas Cassel wrote:
> On Tue, Feb 17, 2026 at 06:02:55PM -0500, Frank Li wrote:
> > On Tue, Feb 17, 2026 at 10:27:13PM +0100, Niklas Cassel wrote:
> > > Advertise reserved BARs as reserved in the Capabilities register,
> > > such that the host side driver will be able to skip reserved BARs.
> > >
> > > Signed-off-by: Niklas Cassel <cassel@kernel.org>
> > > ---
> > > drivers/pci/endpoint/functions/pci-epf-test.c | 24 +++++++++++++++++++
> > > 1 file changed, 24 insertions(+)
> > >
> > > diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c
> > > index 0cb7af0919dc..4c7e42fe5d8e 100644
> > > --- a/drivers/pci/endpoint/functions/pci-epf-test.c
> > > +++ b/drivers/pci/endpoint/functions/pci-epf-test.c
> > > @@ -64,6 +64,12 @@
> > > #define CAP_MSIX BIT(2)
> > > #define CAP_INTX BIT(3)
> > > #define CAP_SUBRANGE_MAPPING BIT(4)
> > > +#define CAP_BAR0_RESERVED BIT(5)
> > > +#define CAP_BAR1_RESERVED BIT(6)
> > > +#define CAP_BAR2_RESERVED BIT(7)
> > > +#define CAP_BAR3_RESERVED BIT(8)
> > > +#define CAP_BAR4_RESERVED BIT(9)
> > > +#define CAP_BAR5_RESERVED BIT(10)
> > >
> > > #define PCI_EPF_TEST_BAR_SUBRANGE_NSUB 2
> > >
> > > @@ -1106,6 +1112,24 @@ static void pci_epf_test_set_capabilities(struct pci_epf *epf)
> > > epf_test->epc_features->subrange_mapping)
> > > caps |= CAP_SUBRANGE_MAPPING;
> > >
> > > + if (epf_test->epc_features->bar[BAR_0].type == BAR_RESERVED)
> > > + caps |= CAP_BAR0_RESERVED;
> >
> > Is it BAR_DISABLE? suppose BAR_RESERVED redefine as hardware MMIO mapped
> > bar
>
>
> A BAR that is defined as BAR_DISABLE will always be disabled by the EPC
> driver, so the host side driver will not see the BAR in the first place.
>
> If you try to run pci_endpoint_test against a disabled BAR, the size will
> be zero, and pci_endpoint_test will return -ENODATA:
> https://github.com/torvalds/linux/blob/v6.19/drivers/misc/pci_endpoint_test.c#L300-L302
>
> and the pci_endpoint selftest will print SKIP for that test case.
>
>
> BAR_RESERVED is describing a BAR that has hardware backed resources, e.g. eDMA
> registers, iATU registers, MSI-X table. These BARs are never disabled by an
> EPC driver by default. See the kdoc for these enum values here:
> https://lore.kernel.org/linux-pci/20260217212707.2450423-15-cassel@kernel.org/
>
>
> Thus, we need to tell pci_endpoint_test that these reserved BARs (which are
> not disabled) has to be skipped, because if we perfrom READ/WRITE tests
> against these BARs, bad things will happen. E.g. if you write to a BAR that
> exposes iATU registers, you will clear/overwrite the current inbound addresss
> translation configured by the endpoint.
I see. it actually means skip bar test. is CAP_SKIP_BAR<n>_TEST better?
Frank
>
>
> Kind regards,
> Niklas
next prev parent reply other threads:[~2026-02-18 16:00 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-17 21:27 [PATCH 0/9] PCI: endpoint differentiate between disabled and reserved BARs Niklas Cassel
2026-02-17 21:27 ` [PATCH 1/9] PCI: endpoint: Introduce pci_epc_bar_type BAR_64BIT_UPPER Niklas Cassel
2026-02-17 21:57 ` Frank Li
[not found] ` <81af7f88-b9c1-457f-9a21-a7b15a13d374@nvidia.com>
2026-02-23 10:14 ` Geert Uytterhoeven
2026-02-24 13:54 ` Manikanta Maddireddy
2026-02-17 21:27 ` [PATCH 2/9] PCI: endpoint: Describe reserved subregions within BARs Niklas Cassel
2026-02-23 4:06 ` Manikanta Maddireddy
2026-02-17 21:27 ` [PATCH 3/9] PCI: dw-rockchip: Describe RK3588 BAR4 DMA ctrl window Niklas Cassel
2026-02-23 4:10 ` Manikanta Maddireddy
2026-02-17 21:27 ` [PATCH 4/9] PCI: endpoint: Introduce pci_epc_bar_type BAR_DISABLED Niklas Cassel
2026-02-17 22:03 ` Frank Li
2026-02-18 10:33 ` Niklas Cassel
2026-02-18 16:01 ` Frank Li
2026-02-23 4:17 ` Manikanta Maddireddy
2026-02-17 21:27 ` [PATCH 5/9] PCI: dwc: Replace BAR_RESERVED with BAR_DISABLED in glue drivers Niklas Cassel
2026-02-17 22:15 ` Frank Li
2026-02-23 4:46 ` Manikanta Maddireddy
2026-02-25 14:56 ` Niklas Cassel
2026-02-17 21:27 ` [PATCH 6/9] PCI: dwc: Disable BARs in common code instead of in each glue driver Niklas Cassel
2026-02-17 23:00 ` Frank Li
2026-02-17 21:27 ` [PATCH 7/9] PCI: endpoint: pci-epf-test: Advertise reserved BARs Niklas Cassel
2026-02-17 23:02 ` Frank Li
2026-02-18 10:43 ` Niklas Cassel
2026-02-18 16:00 ` Frank Li [this message]
2026-02-19 9:35 ` Niklas Cassel
2026-02-19 17:12 ` Frank Li
2026-02-23 4:57 ` Manikanta Maddireddy
2026-02-17 21:27 ` [PATCH 8/9] misc: pci_endpoint_test: Give reserved BARs a distinct error code Niklas Cassel
2026-02-17 21:45 ` Niklas Cassel
2026-02-17 23:07 ` Frank Li
2026-02-18 10:44 ` Niklas Cassel
2026-02-23 5:00 ` Manikanta Maddireddy
2026-02-25 15:46 ` Niklas Cassel
2026-02-17 21:27 ` [PATCH 9/9] selftests: pci_endpoint: Skip reserved BARs Niklas Cassel
2026-02-17 23:11 ` Frank Li
2026-02-23 5:03 ` Manikanta Maddireddy
2026-02-23 3:49 ` [PATCH 0/9] PCI: endpoint differentiate between disabled and " Manikanta Maddireddy
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