Re: [PATCH 5/8] drm/i915/pciids: don't include WHL/CML PCI IDs in CFL

Rodrigo Vivi
2024-05-10T13:32:50Z

On Fri, May 10, 2024 at 02:22:18PM +0300, Jani Nikula wrote:
> It's confusing for INTEL_CFL_IDS() to include all WHL and CML PCI
> IDs. Even if we treat them the same in a lot of places, CML is a
> platform of its own, and the lists of PCI IDs should not conflate them.
>
> Largely go by the idea that if a platform has a name, group its PCI IDs
> together.
>
> That said, AML is special, having both KBL and CFL variants. Leave that
> alone.

fine by me, and thanks for the CML WHL.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

>
> v2: Also split out WHL not just CML (Rodrigo)
>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: linux-pci@vger.kernel.org
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> arch/x86/kernel/early-quirks.c | 2 ++
> .../drm/i915/display/intel_display_device.c | 2 ++
> include/drm/i915_pciids.h | 30 +++++++++++--------
> 3 files changed, 21 insertions(+), 13 deletions(-)
>
> diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
> index 6549507003ec..2b698a3f56ef 100644
> --- a/arch/x86/kernel/early-quirks.c
> +++ b/arch/x86/kernel/early-quirks.c
> @@ -543,6 +543,8 @@ static const struct pci_device_id intel_early_ids[] __initconst = {
> INTEL_BXT_IDS(&gen9_early_ops),
> INTEL_KBL_IDS(&gen9_early_ops),
> INTEL_CFL_IDS(&gen9_early_ops),
> + INTEL_WHL_IDS(&gen9_early_ops),
> + INTEL_CML_IDS(&gen9_early_ops),
> INTEL_GLK_IDS(&gen9_early_ops),
> INTEL_CNL_IDS(&gen9_early_ops),
> INTEL_ICL_11_IDS(&gen11_early_ops),
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index bb681c8ed8a0..23909a8e2dc8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -829,6 +829,8 @@ static const struct {
> INTEL_GLK_IDS(&glk_display),
> INTEL_KBL_IDS(&skl_display),
> INTEL_CFL_IDS(&skl_display),
> + INTEL_WHL_IDS(&skl_display),
> + INTEL_CML_IDS(&skl_display),
> INTEL_ICL_11_IDS(&icl_display),
> INTEL_EHL_IDS(&jsl_ehl_display),
> INTEL_JSL_IDS(&jsl_ehl_display),
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index 16778d92346b..0c5a20d59801 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -488,6 +488,12 @@
> INTEL_VGA_DEVICE(0x9BCA, info), \
> INTEL_VGA_DEVICE(0x9BCC, info)
>
> +#define INTEL_CML_IDS(info) \
> + INTEL_CML_GT1_IDS(info), \
> + INTEL_CML_GT2_IDS(info), \
> + INTEL_CML_U_GT1_IDS(info), \
> + INTEL_CML_U_GT2_IDS(info)
> +
> #define INTEL_KBL_IDS(info) \
> INTEL_KBL_GT1_IDS(info), \
> INTEL_KBL_GT2_IDS(info), \
> @@ -527,6 +533,15 @@
> INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
> INTEL_VGA_DEVICE(0x3EA8, info) /* ULT GT3 */
>
> +#define INTEL_CFL_IDS(info) \
> + INTEL_CFL_S_GT1_IDS(info), \
> + INTEL_CFL_S_GT2_IDS(info), \
> + INTEL_CFL_H_GT1_IDS(info), \
> + INTEL_CFL_H_GT2_IDS(info), \
> + INTEL_CFL_U_GT2_IDS(info), \
> + INTEL_CFL_U_GT3_IDS(info), \
> + INTEL_AML_CFL_GT2_IDS(info)
> +
> /* WHL/CFL U GT1 */
> #define INTEL_WHL_U_GT1_IDS(info) \
> INTEL_VGA_DEVICE(0x3EA1, info), \
> @@ -541,21 +556,10 @@
> #define INTEL_WHL_U_GT3_IDS(info) \
> INTEL_VGA_DEVICE(0x3EA2, info)
>
> -#define INTEL_CFL_IDS(info) \
> - INTEL_CFL_S_GT1_IDS(info), \
> - INTEL_CFL_S_GT2_IDS(info), \
> - INTEL_CFL_H_GT1_IDS(info), \
> - INTEL_CFL_H_GT2_IDS(info), \
> - INTEL_CFL_U_GT2_IDS(info), \
> - INTEL_CFL_U_GT3_IDS(info), \
> +#define INTEL_WHL_IDS(info) \
> INTEL_WHL_U_GT1_IDS(info), \
> INTEL_WHL_U_GT2_IDS(info), \
> - INTEL_WHL_U_GT3_IDS(info), \
> - INTEL_AML_CFL_GT2_IDS(info), \
> - INTEL_CML_GT1_IDS(info), \
> - INTEL_CML_GT2_IDS(info), \
> - INTEL_CML_U_GT1_IDS(info), \
> - INTEL_CML_U_GT2_IDS(info)
> + INTEL_WHL_U_GT3_IDS(info)
>
> /* CNL */
> #define INTEL_CNL_PORT_F_IDS(info) \
> --
> 2.39.2
>