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Fri, 7 Jul 2023 10:54:18 GMT Received: from [10.216.29.164] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Fri, 7 Jul 2023 03:54:12 -0700 Message-ID: Date: Fri, 7 Jul 2023 16:24:08 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.13.1 Subject: Re: [PATCH v2 2/8] PCI: qcom-ep: Add support for D-state change notification Content-Language: en-US To: Manivannan Sadhasivam CC: , , , , , , , , , , "Lorenzo Pieralisi" , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Rob Herring , Bjorn Helgaas References: <1688122331-25478-1-git-send-email-quic_krichai@quicinc.com> <1688122331-25478-3-git-send-email-quic_krichai@quicinc.com> <20230707055121.GB6001@thinkpad> From: Krishna Chaitanya Chundru In-Reply-To: <20230707055121.GB6001@thinkpad> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: kqf_3dYBNtcdpNEdMb-CvSvgkQ6KXKcl X-Proofpoint-GUID: kqf_3dYBNtcdpNEdMb-CvSvgkQ6KXKcl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-07_06,2023-07-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 clxscore=1015 phishscore=0 mlxlogscore=999 bulkscore=0 spamscore=0 impostorscore=0 mlxscore=0 adultscore=0 malwarescore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307070099 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On 7/7/2023 11:21 AM, Manivannan Sadhasivam wrote: > On Fri, Jun 30, 2023 at 04:22:05PM +0530, Krishna chaitanya chundru wrote: >> Add support to pass D-state change notification to Endpoint >> function driver. >> >> Signed-off-by: Krishna chaitanya chundru > Few comments below. > >> --- >> drivers/pci/controller/dwc/pcie-qcom-ep.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c >> index 1435f51..e75aec4 100644 >> --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c >> +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c >> @@ -561,6 +561,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) >> struct device *dev = pci->dev; >> u32 status = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_STATUS); >> u32 mask = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_MASK); >> + pci_power_t state; >> u32 dstate, val; >> >> writel_relaxed(status, pcie_ep->parf + PARF_INT_ALL_CLEAR); >> @@ -583,11 +584,16 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) >> dstate = dw_pcie_readl_dbi(pci, DBI_CON_STATUS) & >> DBI_CON_STATUS_POWER_STATE_MASK; >> dev_dbg(dev, "Received D%d state event\n", dstate); > We should also change this debug output to make use of pci_power_name() based on > the "state" variable and move it just above pci_epc_dstate_change(). But this > should be a separate patch. I will add a seperate patch in the same series > >> + state = dstate; >> if (dstate == 3) { >> val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); >> val |= PARF_PM_CTRL_REQ_EXIT_L1; >> writel_relaxed(val, pcie_ep->parf + PARF_PM_CTRL); >> + state = PCI_D3hot; >> + if (gpiod_get_value(pcie_ep->reset)) >> + state = PCI_D3cold; >> } >> + pci_epc_dstate_change(pci->ep.epc, state); > Need to change this API as per my comment on patch 1. > > - Mani sure will change it as you suggested. - KC > >> } else if (FIELD_GET(PARF_INT_ALL_LINK_UP, status)) { >> dev_dbg(dev, "Received Linkup event. Enumeration complete!\n"); >> dw_pcie_ep_linkup(&pci->ep); >> -- >> 2.7.4 >>