From: Krzysztof Kozlowski <krzk@kernel.org>
To: Sai Krishna Musham <sai.krishna.musham@amd.com>,
bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
manivannan.sadhasivam@linaro.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, cassel@kernel.org
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, michal.simek@amd.com,
bharat.kumar.gogada@amd.com, thippeswamy.havalige@amd.com
Subject: Re: [PATCH v4 1/2] dt-bindings: PCI: xilinx-cpm: Add reset-gpios for PCIe RP PERST#
Date: Tue, 18 Mar 2025 10:52:37 +0100 [thread overview]
Message-ID: <afe7947b-ed71-40d0-aa2e-b16549fc6b7d@kernel.org> (raw)
In-Reply-To: <20250318092648.2298280-2-sai.krishna.musham@amd.com>
On 18/03/2025 10:26, Sai Krishna Musham wrote:
> Changes for v2:
> - Add define from include/dt-bindings/gpio/gpio.h for PERST# polarity
> - Update commit message
> ---
> .../bindings/pci/xilinx-versal-cpm.yaml | 21 ++++++++++++++-----
> 1 file changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> index d674a24c8ccc..904594138af2 100644
> --- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> +++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> @@ -24,15 +24,20 @@ properties:
> items:
> - description: CPM system level control and status registers.
> - description: Configuration space region and bridge registers.
> + - description: CPM clock and reset control registers.
> - description: CPM5 control and status registers.
You cannot add items to the middle, that's an ABI break. Adding required
properties is also an ABI break. Why you cannot add it to the end of the
list?
Or at least explain ABI break impact in commit msg?
> - minItems: 2
> + minItems: 3
>
> reg-names:
> items:
> - const: cpm_slcr
> - const: cfg
> + - const: cpm_crx
> - const: cpm_csr
> - minItems: 2
> + minItems: 3
> +
> + reset-gpios:
> + description: GPIO used as PERST# signal
Isn't this already in pci-bus-common.yaml?
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-03-18 9:52 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-18 9:26 [PATCH v4 0/2] Add support for PCIe RP PERST# Sai Krishna Musham
2025-03-18 9:26 ` [PATCH v4 1/2] dt-bindings: PCI: xilinx-cpm: Add reset-gpios " Sai Krishna Musham
2025-03-18 9:52 ` Krzysztof Kozlowski [this message]
2025-03-21 9:42 ` Musham, Sai Krishna
2025-03-24 7:19 ` Krzysztof Kozlowski
2025-03-26 2:23 ` Musham, Sai Krishna
2025-03-18 9:26 ` [PATCH v4 2/2] PCI: xilinx-cpm: Add support for PCIe RP PERST# signal Sai Krishna Musham
2025-03-18 9:54 ` Krzysztof Kozlowski
2025-03-21 12:52 ` Manivannan Sadhasivam
2025-03-24 9:29 ` Musham, Sai Krishna
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