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Mon, 01 Jun 2026 12:16:21 -0700 (PDT) Received: from localhost ([2a00:79e0:2e7c:8:d53d:3040:2c80:7717]) by smtp.gmail.com with UTF8SMTPSA id 5a478bee46e88-304ee0dd8e1sm13033848eec.21.2026.06.01.12.16.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 01 Jun 2026 12:16:21 -0700 (PDT) Date: Mon, 1 Jun 2026 12:16:18 -0700 From: Brian Norris To: manivannan.sadhasivam@oss.qualcomm.com Cc: Bjorn Helgaas , Manivannan Sadhasivam , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Keith Busch , Jens Axboe , Christoph Hellwig , Sagi Grimberg , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-nvme@lists.infradead.org Subject: Re: [PATCH v2 0/4] PCI: Introduce pci_suspend_retains_context() API Message-ID: References: <20260519-l1ss-fix-v2-0-b2c3a4bdeb15@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260519-l1ss-fix-v2-0-b2c3a4bdeb15@oss.qualcomm.com> On Tue, May 19, 2026 at 01:41:19PM +0530, Manivannan Sadhasivam via B4 Relay wrote: > Hi all, > > This series introduces a new PCI API, pci_suspend_retains_context() to > let the client drivers know whether they can expect context retention across > suspend/resume or not and uses it in the NVMe PCI host driver. > > This new API is targeted to abstract the PCI power management details away from > the client drivers. This is needed because client drivers like NVMe make use of > APIs such as pm_suspend_via_firmware() and decide to keep the device in low > power mode if this API returns 'false'. But some platforms may have other > limitations like in the case of Qcom, where if the RC driver removes the PCIe RC > resource vote to allow the SoC to enter low power mode, it cannot reliably exit > the L1ss state when the endpoint asserts CLKREQ#. So in this case also, the > client drivers cannot keep the device in low power state during suspend and > expect context retention. > > And these limitations may just keep adding in the future. Without a unified > API, the client drivers have to implement their own logic which may cause code > duplication and may also lead to drivers missing some of the platform > limitations. > > Once this series gets merged, we can extend this API usage to other client > drivers as well. > > Testing > ======= > > This series is tested on Qualcomm Hamoa based Lenovo Thinkpad T14s latop with > NVMe drive. > > Signed-off-by: Manivannan Sadhasivam FWIW, this was already applied to pci/next for v7.2, but I'll add that it seems this resolves what appeared as a regression in v7.0 for me when using a Qualcomm SC7280-based laptop (arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts): report: https://lore.kernel.org/linux-pci/ahC8Pyuatu_AvnZp@google.com/ test notes: https://lore.kernel.org/linux-pci/ah3XLfI7E39B1UPh@google.com/ In short, my NVMe failed to resume from suspend-to-mem: [ 58.384442] nvme 0001:01:00.0: Unable to change power state from unknown to D0, device inaccessible ... [ 68.875606] nvme 0001:01:00.0: PM: **** DPM device timeout **** Notably, this regression bisected to commit eaf290c404f7 ("PCI: dwc: Enable MSI affinity support"), though I'm still not quite sure why. Anyway, for $subject series, I'll provide my late tags: Closes: https://lore.kernel.org/linux-pci/ahC8Pyuatu_AvnZp@google.com/ Tested-by: Brian Norris