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[34.124.234.44]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2beb5695a75sm133234215ad.14.2026.05.25.11.38.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 May 2026 11:38:36 -0700 (PDT) Date: Mon, 25 May 2026 18:38:30 +0000 From: Pranjal Shrivastava To: Jason Gunthorpe Cc: iommu@lists.linux.dev, linux-pci@vger.kernel.org, Will Deacon , Joerg Roedel , Bjorn Helgaas , Robin Murphy , Mostafa Saleh , Nicolin Chen , Samiullah Khawaja , Daniel Mentz , Pasha Tatashin , David Matlack Subject: Re: [PATCH v3 3/3] iommu/arm-smmu-v3: Fix ATS state tracking via ats_prepared gate Message-ID: References: <20260519135323.1558777-4-praan@google.com> <20260519144430.GI7702@ziepe.ca> <20260519145947.GK7702@ziepe.ca> <20260520145142.GU7702@ziepe.ca> <20260520163117.GX7702@ziepe.ca> <20260523123418.GE7702@ziepe.ca> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260523123418.GE7702@ziepe.ca> On Sat, May 23, 2026 at 09:34:18AM -0300, Jason Gunthorpe wrote: > On Fri, May 22, 2026 at 04:14:01PM +0000, Pranjal Shrivastava wrote: > > > > > > Though really pci_enable_ats is not working the way we want, writing > > > the enable register can't actually fail - it is all the sanity > > > checking for kernel bugs that is the problem here. > > > > > > How about call pci_ats_supported() early in attach and fail, then if > > > pci_enable_ats() fails just WARN_ON and keep going, kernel bug. > > > > > > Re-organize pci_enable_ats() so it relies on pci_ats_supported() for > > > all the sanity checks and cannot fail if supported is true. > > > > Hmm, IIUC, the current situation says: > > > > pci_ats_supported ==> ATS cap check > > pci_prepare_ats ==> ATS enablement prep > > > > Thus, I feel if the prepare fails, we should expect enable to fail. But > > if prepare succeeds but enable didn't, that's the place we should > > WARN_ON and move on.. because we (IOMMU) did the best we could have.. > > > > With the updated variants of pci_ats_support / pci_prepare_ats (in > > patches 1 & 2), I believe we cover all the cases now.. > > > > And we plan to call prepare_ats only if (pci_ats_supported == true) > > > > Thus, if prepare_ats failed, we fail at probe. And if probe succeeds but > > enable ATS failed, that's something the IOMMU can't help with, hence we > > WARN and move on? Does that sound good? > > OK, what I really want to avoid is wrecking the attach flow. It is > designed so the failable things happen early and after a certain point > failure is no longer permitted, the enable_ats is after the point. > > So it should continue to be structued like that - enable_ats > failing is a kernel bug because earlier checks preclude it.. Ack. I see your point about maintaining the integrity of the attach flow Will post another version Thanks, Praan