From: Pranjal Shrivastava <praan@google.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: Nicolin Chen <nicolinc@nvidia.com>,
will@kernel.org, robin.murphy@arm.com, joro@8bytes.org,
bhelgaas@google.com, baolu.lu@linux.intel.com,
kevin.tian@intel.com, miko.lenczewski@arm.com,
linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
dan.j.williams@intel.com, jonathan.cameron@huawei.com,
vsethi@nvidia.com, linux-cxl@vger.kernel.org, nirmoyd@nvidia.com
Subject: Re: [PATCH v6 3/3] iommu/arm-smmu-v3: Allow ATS to be always on
Date: Thu, 28 May 2026 18:14:57 +0000 [thread overview]
Message-ID: <ahiGIUDG2uvA6usM@google.com> (raw)
In-Reply-To: <20260528180018.GB3195266@nvidia.com>
On Thu, May 28, 2026 at 03:00:18PM -0300, Jason Gunthorpe wrote:
> On Thu, May 28, 2026 at 04:32:23PM +0000, Pranjal Shrivastava wrote:
> > On Thu, May 28, 2026 at 12:29:30PM -0300, Jason Gunthorpe wrote:
> > > On Thu, May 28, 2026 at 03:24:40PM +0000, Pranjal Shrivastava wrote:
> > >
> > > > > + master->ats_always_on = true;
> > > > > +
> > > > > + return arm_smmu_alloc_cd_tables(master);
> > > >
> > > > Nit: I'm not sure if I'm getting this right, are we saying we *need* to
> > > > allocate CDs for CXL.cache cases in the probe itself because STE.EATS
> > > > requires Config=Translate with S1DSS in bypass?
> > >
> > > Yeah, basically.
> > >
> > > Effectively the ARM rules for enabling ATS and Bypass together require
> > > a valid CD table pointer.
> >
> > Ack. But do we expect transactions before attach_dev? What'd happen if
> > we don't allocate CDs here?
>
> It can be done at any point before a non-abort STE is formed.
>
> The core code pretty much does this immediately after probe so there
> isn't much point in moving it later.
>
Right.. that's what I'm not understanding clearly, if the STE is Abort
anyway during probe, why are we breaking the alloc-at-attach convention?
Usually, we allocate CD tables in the first attach_dev call. Why does
that not work here?
[Disclaimer: Not a pushback, just trying to understand the requirement]
Praan
next prev parent reply other threads:[~2026-05-28 18:15 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-21 20:34 [PATCH v6 0/3] Allow ATS to be always on for certain ATS-capable devices Nicolin Chen
2026-05-21 20:34 ` [PATCH v6 1/3] PCI: Add pci_ats_required() for CXL.cache capable devices Nicolin Chen
2026-05-21 20:57 ` Bjorn Helgaas
2026-05-21 21:07 ` Nicolin Chen
2026-05-21 21:31 ` Bjorn Helgaas
2026-05-21 21:59 ` Nicolin Chen
2026-05-22 9:19 ` Yi Liu
2026-05-21 20:34 ` [PATCH v6 2/3] PCI: Allow ATS to be always on for pre-CXL devices Nicolin Chen
2026-05-22 9:17 ` Yi Liu
2026-05-21 20:34 ` [PATCH v6 3/3] iommu/arm-smmu-v3: Allow ATS to be always on Nicolin Chen
2026-05-28 15:24 ` Pranjal Shrivastava
2026-05-28 15:29 ` Jason Gunthorpe
2026-05-28 16:32 ` Pranjal Shrivastava
2026-05-28 18:00 ` Jason Gunthorpe
2026-05-28 18:14 ` Pranjal Shrivastava [this message]
2026-05-28 18:20 ` Nicolin Chen
2026-05-28 20:04 ` Jason Gunthorpe
2026-05-28 20:39 ` Pranjal Shrivastava
2026-05-28 7:35 ` [PATCH v6 0/3] Allow ATS to be always on for certain ATS-capable devices Jörg Rödel
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