From: Braden Zhang <braden_zhang@lecomputing.com>
To: Manivannan Sadhasivam <mani@kernel.org>
Cc: Braden Zhang <braden_zhang@lecomputing.com>,
Brett Zhou <brett_zhou@lecomputing.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Jingoo Han <jingoohan1@gmail.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 v3] PCI: dwc: Add pci id for LECARC pcie pmu
Date: Mon, 20 Jul 2026 15:43:15 +0800 [thread overview]
Message-ID: <al3Rk_bPzfEpFTnc@arm01> (raw)
In-Reply-To: <aik4muvixggxmphxjlpsr4kbfw3sxuh5pj5u7g3olhlg65shfp@kaqahgep3kdu>
On Mon, Jul 13, 2026 at 07:14:25AM +0200, Manivannan Sadhasivam wrote:
> Date: Mon, 13 Jul 2026 07:14:25 +0200
> From: Manivannan Sadhasivam <mani@kernel.org>
> To: Braden Zhang <braden_zhang@lecomputing.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>, Jingoo Han <jingoohan1@gmail.com>,
> linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Brett Zhou
> <brett_zhou@lecomputing.com>, Bjorn Helgaas <helgaas@kernel.org>
> Subject: Re: [PATCH v3 v3] PCI: dwc: Add pci id for LECARC pcie pmu
>
> On Mon, Jul 13, 2026 at 10:10:13AM +0800, Braden Zhang wrote:
> > From: Brett Zhou <brett_zhou@lecomputing.com>
> >
> > This patch adds support for the PCIe PMU found
> > on LECARC SoCs, which utilize the DesignWare PCIe Controller IP
> >
>
> LECARC looks like a ACPI based platform. I'm wondering how you are able to make
> use of this patch without adding the ACPI ID support to enumerate the DWC
> driver.
>
> - Mani
>
> > Signed-off-by: Brett Zhou <brett_zhou@lecomputing.com>
> > Reviewed-by: Bjorn Helgaas <helgaas@kernel.org>
> > Signed-off-by: Braden Zhang <braden_zhang@lecomputing.com>
> > ---
> >
> > ---
> > base-commit: a635d6748234582ea287c5ffeae28b9b23f91c7e
> > change-id: 20260710-pcie-pmu-5ef78c56c3b6
> >
> > Best regards,
> > --
> > Braden Zhang <braden_zhang@lecomputing.com>
> >
>
> --
Hi Mani,
Thanks for the review.
LECARC platforms use the standard DesignWare PCIe Controller, and the
existing DWC driver already handles the enumeration and basic
functionality through the generic PCIe core. This patch only adds the
PCI vendor ID to the vendor-specific capability (VSEC) list, which
enables the standard DWC RAS/DES feature detection.
We don't require a separate PMU driver or additional ACPI ID support
because the PMU functionality is already covered by the generic DWC
PMU framework. The existing driver infrastructure handles the PMU
features transparently once the vendor ID is recognized in the VSEC
table.
Please let us know if you have any other concerns.
Best regards,
Braden Zhang
next prev parent reply other threads:[~2026-07-20 7:58 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-13 2:10 [PATCH v3 v3] PCI: dwc: Add pci id for LECARC pcie pmu Braden Zhang
2026-07-13 2:31 ` sashiko-bot
2026-07-13 5:14 ` Manivannan Sadhasivam
2026-07-20 7:43 ` Braden Zhang [this message]
2026-07-20 12:31 ` Manivannan Sadhasivam
2026-07-13 17:38 ` Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=al3Rk_bPzfEpFTnc@arm01 \
--to=braden_zhang@lecomputing.com \
--cc=bhelgaas@google.com \
--cc=brett_zhou@lecomputing.com \
--cc=jingoohan1@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=mani@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox