From: Thomas Gleixner <tglx@linutronix.de>
To: Yevgeny Petrilin <yevgenyp@mellanox.com>
Cc: Jiang Liu <liuj97@gmail.com>, Bjorn Helgaas <bhelgaas@google.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Yael Shenhav <yaeli@mellanox.com>
Subject: RE: IRQ affinity enforced only after first interrupt.
Date: Tue, 27 Mar 2012 14:52:35 +0200 (CEST) [thread overview]
Message-ID: <alpine.LFD.2.02.1203271444310.2542@ionos> (raw)
In-Reply-To: <953B660C027164448AE903364AC447D2618E24BF@MTLDAG02.mtl.com>
On Tue, 27 Mar 2012, Yevgeny Petrilin wrote:
> > > >
> > > > The architecture specific code will determine whether the IRQ could be migrated
> > > > in process context. For example, the IRQ_MOVE_PCNTXT flag will be set on x86
> > > > systems if interrupt remapping is enabled.
> > >
> > > Actually I am encountering this issue with x86, and see different
> > > behavior with different HW devices (NICs). On same machine I have
> > > one device that responds immediately to affinity changes while the
> > > other one changes the affinity only after first interrupt.
> >
> > That simply depends on the underlying hardware. On certain hardware we
> > can change the affinity only in hard interrupt context, that means
> > right when a interrupt of that device is delivered.
> >
> > On the other devices we can change it right away and the corresponding
> > interrupt chips set IRQ_MOVE_PCNTXT to indicate that.
> >
> > There is nothing we can do about this. It's dictated by hardware.
> >
>
> Thanks for the explanation,
> Which capabilities of the HW show whether IRQ_MOVE_PCNTXT can be set or not?
> Is it done by reading configuration from PCI?
It's done by reading the specs of the interrupt controllers. This is
not at PCI (device) level. It's a property of the interrupt controller
(PIC, APIC, IOAPIC) and additional features like interrupt remapping.
The device merily uses an interrupt, but it does not know at all which
underlying interrupt controller is handling it.
The only choice a device driver has is between pin based interrupts
and Message Signaled Interrupts, when the hardware supports it. This
information is retrieved from the PCI config space.
Thanks,
tglx
next prev parent reply other threads:[~2012-03-27 12:52 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-26 9:06 IRQ affinity enforced only after first interrupt Yevgeny Petrilin
2012-03-26 14:28 ` Bjorn Helgaas
2012-03-26 14:33 ` Jiang Liu
2012-03-26 15:24 ` Yevgeny Petrilin
2012-03-26 19:04 ` Thomas Gleixner
2012-03-27 9:39 ` Yevgeny Petrilin
2012-03-27 12:52 ` Thomas Gleixner [this message]
2012-04-04 10:01 ` Alexander Gordeev
2012-04-05 8:47 ` Thomas Gleixner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=alpine.LFD.2.02.1203271444310.2542@ionos \
--to=tglx@linutronix.de \
--cc=bhelgaas@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=liuj97@gmail.com \
--cc=yaeli@mellanox.com \
--cc=yevgenyp@mellanox.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).