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Tue, 1 Sep 2026 04:09:39 +0000 (GMT) Date: Tue, 1 Sep 2026 09:39:36 +0530 From: Mahesh J Salgaonkar To: Avinash Roy Cc: maddy@linux.ibm.com, mpe@ellerman.id.au, bhelgaas@google.com, npiggin@gmail.com, chleroy@kernel.org, sbhat@linux.ibm.com, linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Avinash Roy Subject: Re: [PATCH v2] PCI: quirks: Add warm reset quirk for IBM Spyre accelerator Message-ID: Reply-To: mahesh@linux.ibm.com References: <20260821123401.1375297-1-avinash@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260821123401.1375297-1-avinash@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-GUID: YzWiVq3InLbhscNU3rylpUjsgQOeQPUU X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTAxMDAyOCBTYWx0ZWRfX1jNZ5AsARJD+ pn0dJBUqncqgcqO5EiWPtdAJJFVi7yBwMOIMxZB2k9tz4jAlAP4o9ZeYTFnypcba2h840Ys6ipz nWp8XS1YFCn9VKTtk+KpvpP5Otc3I/fHblsd1W4H24AP2ET77t0AbEM2tuzEkOemKgMrSzSOSpn jQ1Oo6rQRBZsIYm2mXDsXBJ8JwUdnL32dEuWeDtyYrWIOEGLjbfoPMmEnZg8sZt8WGT51RBRsdm qWTdBaaFloIuMsF580xnk3f4QUcTwhb43x0XUPWfwFi5TqoKdkGe8XdGapDEaobJOKhwTbeM/69 TL5n+Nxd1Dkk3X5SjPrnKBc4Y0uUgSglwGik18HEoL3j7r8UOEZITeUTwz11sZYoMjCcpNoIA0g Dt1MXrX/nj3/LM7dpsnHFdG6uA3OSgB2IdL5ZFnlNnZ6rAP4XtXuFd7VnNDmlz345DW26TagKDa vIrtXWlSHVJEaTnps9w== X-Proofpoint-ORIG-GUID: OeKiYojqnv-J0a_9aIFXssVMB1267445 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTAxMDAyOCBTYWx0ZWRfX1adZOgvL/aV/ y8azwQA/qm9yYypC2sT3L1C5gQS5goHZaDZTPZ0Z1wqXiAgxMHj71/Pd2CKpnCqBKLTvMgzM8tn pcjpPnmk9fTk5Mz9xbyZ79SXe7Vouw4= X-Authority-Analysis: v=2.4 cv=B92JFutM c=1 sm=1 tr=0 ts=6a96500c cx=c_pps a=aDMHemPKRhS1OARIsFnwRA==:117 a=aDMHemPKRhS1OARIsFnwRA==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=V8glGbnc2Ofi9Qvn3v5h:22 a=VwQbUJbxAAAA:8 a=VnNF1IyMAAAA:8 a=oQsFNTG6mdKaDiMbqvMA:9 a=CjuIK1q_8ugA:10 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-01_01,2026-08-31_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 clxscore=1011 suspectscore=0 phishscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609010028 On 2026-08-21 18:04:01 Fri, Avinash Roy wrote: > From: Shivaprasad G Bhat > > The IBM Spyre accelerator (PCI ID 1014:06a7) requires a dedicated warm > reset method for reliable EEH recovery on pSeries/ppc64 platforms. > > FLR alone is insufficient because it does not re-initialize firmware > state machine for the current version of the card. The existing API > pci_set_pcie_reset_state() is used to drive the platform-level > PERST# using the EEH interfaces by adding a device specific quirk. > > The reset function is placed in arch/powerpc/platforms/pseries/pci.c > where the EEH infrastructure is already present, declared in > pseries.h, and registered in the generic pci_dev_reset_methods[] table > in drivers/pci/quirks.c under a CONFIG_PPC_PSERIES guard. > > This reset method is only registered when CONFIG_PPC_PSERIES is enabled, > so it is not available on other platforms. > > Reset sequence: > - Assert PERST# via pcie_warm_reset, hold 250 ms > - Deassert PERST# via pcie_deassert_reset > - Wait 250 ms for PCIe link retrain > > Signed-off-by: Avinash Roy > Signed-off-by: Shivaprasad G Bhat > > --- > Changelog > v1: https://lore.kernel.org/linux-pci/20260805125100.1-1-avinash.roy1@linux.ibm.com/ > > Reworded the commit message to highlight the warm reset requirement being > a need of the current card and not a platform deficiency. > > diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c > index 84e4ffe957a8..7aa58d57208f 100644 > --- a/arch/powerpc/platforms/pseries/pci.c > +++ b/arch/powerpc/platforms/pseries/pci.c > @@ -11,6 +11,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -236,6 +237,41 @@ static void fixup_winbond_82c105(struct pci_dev* dev) > DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, > fixup_winbond_82c105); > > +/* > + * Reset Spyre adapter using pci_set_pcie_reset_state() > + * This is specifically for PPC platforms where EEH (Enhanced Error Handling) > + * requires this reset method for proper device recovery. > + */ > +int reset_spyre(struct pci_dev *dev, bool probe) > +{ > + int ret; > + > + if (probe) > + return 0; > + > + /* Assert warm reset */ > + ret = pci_set_pcie_reset_state(dev, pcie_warm_reset); > + if (ret) { > + pci_err(dev, "Failed to assert reset: %d\n", ret); > + return ret; > + } > + > + /* Wait for reset to take effect */ > + msleep(250); How did you arriver on this number ? Is this time defined by hardware/firmware specs for reset ? Also, Can you #define the value 250 and use macro instead of constant numbmer. > + > + /* Deassert reset */ > + ret = pci_set_pcie_reset_state(dev, pcie_deassert_reset); > + if (ret) { > + pci_err(dev, "Failed to deassert reset: %d\n", ret); > + return ret; > + } > + > + /* Wait for device to recover */ > + msleep(250); same here. > + > + return 0; > +} > + Thanks, -Mahesh.