Re: [PATCH] PCI: Fix order of device disablement on reset

[Lukas Wunner <lukas@wunner.de>]

On Tue, Sep 15, 2026 at 10:08:32AM -0700, Farhan Ali wrote:
> On 9/15/2026 6:35 AM, Lukas Wunner wrote:
> > Riana reports an AER splat when issuing a Secondary Bus Reset through the
> > "reset_subordinate" sysfs attribute:
> > 
> >    AER: Multiple Uncorrectable (Non-Fatal) error message received from 0000:01:00.0
> >    PCIe Bus Error: severity=Uncorrectable (Non-Fatal), type=Transaction Layer, (Requester ID)
> >      device [8086:e2ff] error status/mask=00100000/00400000
> >      [20] UnsupReq               (First)
> >    AER:   TLP Header: 0x40000001 0x0000000f 0x81190008 0x00000000
> > 
> > The Secondary Bus Reset is issued at the Root Port.  Underneath is a
> > Switch with two Endpoints.  Riana has identified an ordering issue in
> > pci_bus_save_and_disable_locked() as root cause of the AER splat:
[...]
> Since we are changing the order, maybe we should update comment for the
> functions to reflect that. The change does make sense to me, but I am
> curious why we didn't see this before?

We only enabled error reporting by default starting with v6.0 in 2022,
cf. commit f26e58bf6f54.

And the reset_subordinate sysfs attribute only exists since v6.13 in 2025,
cf. commit 2fa046449a82.

So it's relatively new functionality which apparently wasn't exercised
heavily so far.

It's remarkable though that universally enabling error reporting is now
alerting us to hidden bugs like this.  Commit f26e58bf6f54 cautioned
that the change is invasive but it's clearly useful.

Agreed on updating the comment, I'll have to respin the patch and
also address the sashiko findings regarding power management.

Thanks,

Lukas