Linux PCI subsystem development
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From: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
To: "Krishna Chaitanya Chundru" <krishna.chundru@oss.qualcomm.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Johannes Berg" <johannes@sipsolutions.net>,
	"Jeff Johnson" <jjohnson@kernel.org>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, mhi@lists.linux.dev,
	linux-wireless@vger.kernel.org, ath11k@lists.infradead.org,
	quic_jjohnson@quicinc.com, quic_pyarlaga@quicinc.com,
	quic_vbadigan@quicinc.com, quic_vpernami@quicinc.com,
	quic_mrana@quicinc.com
Subject: Re: [PATCH 7/8] PCI: Make pcie_link_speed variable public & export pci_set_target_speed()
Date: Wed, 19 Feb 2025 09:36:32 -0800	[thread overview]
Message-ID: <b0027c1e-cc0b-46ff-8b46-774259f3ed0f@oss.qualcomm.com> (raw)
In-Reply-To: <20250217-mhi_bw_up-v1-7-9bad1e42bdb1@oss.qualcomm.com>

On 2/16/2025 10:34 PM, Krishna Chaitanya Chundru wrote:
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 58f1de626c37..8a3b3195122d 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -305,6 +305,7 @@ enum pci_bus_speed {
>  
>  enum pci_bus_speed pcie_get_speed_cap(struct pci_dev *dev);
>  enum pcie_link_width pcie_get_width_cap(struct pci_dev *dev);
> +extern const unsigned char pcie_link_speed[];

This, and the Patch 8/8 change that uses it, make me cringe.

Should we instead have a functional interface so that the client calls a
function to perform the lookup?

/jeff

  reply	other threads:[~2025-02-19 17:36 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-17  6:34 [PATCH 0/8] bus: mhi: host: Add support for mhi bus bw Krishna Chaitanya Chundru
2025-02-17  6:34 ` [PATCH 1/8] PCI: update current bus speed as part of pci_bus_add_devices() Krishna Chaitanya Chundru
2025-02-17  6:34 ` [PATCH 2/8] PCI/bwctrl: Add support to scale bandwidth before & after link re-training Krishna Chaitanya Chundru
2025-02-17  9:28   ` Ilpo Järvinen
2025-02-19 17:57     ` Krishna Chaitanya Chundru
2025-02-17  6:34 ` [PATCH 3/8] PCI: dwc: Implement .pre_scale_bus_bw() & .post_scale_bus_bw hook Krishna Chaitanya Chundru
2025-02-17  6:34 ` [PATCH 4/8] PCI: dwc: qcom: Update ICC & OPP votes based upon the requested speed Krishna Chaitanya Chundru
2025-02-18  0:36   ` kernel test robot
2025-02-18 22:07   ` Bjorn Helgaas
2025-02-19 17:58     ` Krishna Chaitanya Chundru
2025-02-19 18:27       ` Bjorn Helgaas
2025-02-17  6:34 ` [PATCH 5/8] bus: mhi: host: Add support to read MHI capabilities Krishna Chaitanya Chundru
2025-02-17  6:34 ` [PATCH 6/8] bus: mhi: host: Add support for Bandwidth scale Krishna Chaitanya Chundru
2025-02-17  9:17   ` Ilpo Järvinen
2025-02-19 18:02     ` Krishna Chaitanya Chundru
2025-02-17 10:55   ` kernel test robot
2025-02-17  6:34 ` [PATCH 7/8] PCI: Make pcie_link_speed variable public & export pci_set_target_speed() Krishna Chaitanya Chundru
2025-02-19 17:36   ` Jeff Johnson [this message]
2025-02-17  6:34 ` [PATCH 8/8] wifi: ath11k: add support for MHI bandwidth scaling Krishna Chaitanya Chundru

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