Re: [PATCH v5 5/7] PCI: intel-gw: Add start_link callback function

[Florian Eckert <fe@dev.tdt.de>]

Hello Bjorn

On 2026-05-12 22:49, Bjorn Helgaas wrote:
> On Fri, Apr 17, 2026 at 10:35:49AM +0200, Florian Eckert wrote:
>> The pcie-intel-gw driver has no start_link callback function. This 
>> commit
>> adds the missing callback function so that the driver works again and 
>> does
>> not abort with the following error messages during probing.
>> 
>> [    2.512015] intel-gw-pcie d1000000.pcie: host bridge 
>> /soc/pcie@d1000000 ranges:
>> [    2.517868] intel-gw-pcie d1000000.pcie:      MEM 
>> 0x00dc000000..0x00ddffffff -> 0x00dc000000
>> [    2.528450] intel-combo-phy d0c00000.combo-phy: Set combo mode: 
>> combophy[1]: mode: PCIe single lane mode
>> [    2.551619] intel-gw-pcie d1000000.pcie: No outbound iATU found
>> [    2.556060] intel-gw-pcie d1000000.pcie: Cannot initialize host
>> [    2.561901] intel-gw-pcie d1000000.pcie: probe with driver 
>> intel-gw-pcie failed with error -22
>> [    2.571041] intel-gw-pcie c1100000.pcie: host bridge 
>> /soc/pcie@c1100000 ranges:
>> [    2.577736] intel-gw-pcie c1100000.pcie:      MEM 
>> 0x00ce000000..0x00cfffffff -> 0x00ce000000
>> [    2.588299] intel-combo-phy c0c00000.combo-phy: Set combo mode: 
>> combophy[3]: mode: PCIe single lane mode
>> [    2.611471] intel-gw-pcie c1100000.pcie: No outbound iATU found
>> [    2.615934] intel-gw-pcie c1100000.pcie: Cannot initialize host
>> [    2.621759] intel-gw-pcie c1100000.pcie: probe with driver 
>> intel-gw-pcie failed with error -22
>> 
>> Fixes: c5097b9869a1 ("Revert "PCI: dwc: Wait for link up only if link 
>> is started"")
>> Fixes: da56a1bfbab5 ("PCI: dwc: Wait for link up only if link is 
>> started")
> 
> This applied already; I just want to understand this better for
> writing the merge commit log.
> 
> da56a1bfbab5 and c5097b9869a1 date from v6.5 in 2023.  I guess this
> driver has been completely broken since then and nobody noticed?

We are using the URX851 SoC from MaxLinear in one of our target designs.
The PCIe IP core is also integrated on this SoC. However, the problem is
that we are still working with the MaxLinear SDK, which uses kernel 
5.15.

> Thanks for fixing this up.  I assume that means there is somebody
> actually using this driver, even though nobody cares quite enough to
> maintain it?

Due to the restructuring at Lantiq/Intel/MaxLinear, responsibility
for this component appears to be undefined. The previous maintainer
is no longer reachable.

Since we received no support from the manufacturer, my colleague
and I extracted the relevant components from their SDK and built
the target with the latest kernel using OpenWrt as the build
environment. So far, everything boots and works—except for the
network functionality.

But that's a whole other story, and hopefully it will be resolved soon.

I didn’t want to register me as a maintainer, because I don’t have 
access
to the datasheets for this IP core. If you'd like, I'd be happy to do
that. As we use this SoC in our products.

---
Florian