From: John Hubbard <jhubbard@nvidia.com>
To: Elle Rhumsaa <elle@weathered-steel.dev>
Cc: "Danilo Krummrich" <dakr@kernel.org>,
"Alexandre Courbot" <acourbot@nvidia.com>,
"Joel Fernandes" <joelagnelf@nvidia.com>,
"Timur Tabi" <ttabi@nvidia.com>,
"Alistair Popple" <apopple@nvidia.com>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Alex Gaynor" <alex.gaynor@gmail.com>,
"Boqun Feng" <boqun.feng@gmail.com>,
"Gary Guo" <gary@garyguo.net>,
"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Trevor Gross" <tmgross@umich.edu>,
nouveau@lists.freedesktop.org, linux-pci@vger.kernel.org,
rust-for-linux@vger.kernel.org,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 1/3] rust: pci: provide access to PCI Class, subclass, implementation values
Date: Wed, 20 Aug 2025 10:22:02 -0700 [thread overview]
Message-ID: <b7063e19-e917-41e4-85fb-b566fc89f301@nvidia.com> (raw)
In-Reply-To: <aKVFVO3wbzClcLwg@archiso>
On 8/19/25 8:48 PM, Elle Rhumsaa wrote:
> On Sun, Aug 17, 2025 at 06:33:03PM -0700, John Hubbard wrote:
>> Allow callers to write Class::STORAGE_SCSI instead of
>> bindings::PCI_CLASS_STORAGE_SCSI, for example.
>>
>> New APIs:
>> Class::STORAGE_SCSI, Class::NETWORK_ETHERNET, etc.
>> Class::from_u32(), as_u32()
>> Class::MASK_FULL, MASK_CLASS_SUBCLASS
>> DeviceId::from_class_and_vendor()
>> Device::class_code_raw(), class_enum()
>>
>> Cc: Danilo Krummrich <dakr@kernel.org>
>> Signed-off-by: John Hubbard <jhubbard@nvidia.com>
>> ---
>> rust/kernel/pci.rs | 202 +++++++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 202 insertions(+)
>>
>> diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs
>> index 887ee611b553..9caa1d342d52 100644
>> --- a/rust/kernel/pci.rs
>> +++ b/rust/kernel/pci.rs
>> @@ -23,6 +23,179 @@
>> };
>> use kernel::prelude::*;
>>
>> +macro_rules! define_all_pci_classes {
>> + (
>> + $($variant:ident = $binding:expr,)+
>> + ) => {
>> + /// Converts a PCI class constant to 24-bit format.
>> + ///
>> + /// Many device drivers use only the upper 16 bits (base class and subclass), but some
>> + /// use the full 24 bits. In order to support both cases, store the class code as a 24-bit
>> + /// value, where 16-bit values are shifted up 8 bits.
>> + const fn to_24bit_class(val: u32) -> u32 {
>> + if val > 0xFFFF { val } else { val << 8 }
>> + }
>> +
>> + /// PCI device class codes.
>> + ///
>> + /// Each entry contains the full 24-bit PCI class code (base class in bits 23-16, subclass
>> + /// in bits 15-8, programming interface in bits 7-0).
>> + ///
>> + #[derive(Debug, Clone, Copy, PartialEq, Eq)]
>> + #[repr(transparent)]
>> + pub struct Class(u32);
>> +
>> + impl Class {
>> + $(
>> + #[allow(missing_docs)]
>> + pub const $variant: Self = Self(to_24bit_class($binding));
>> + )+
>> +
>> + /// Match the full class code.
>> + pub const MASK_FULL: u32 = 0xffffff;
>> +
>> + /// Match the upper 16 bits of the class code (base class and subclass only).
>> + pub const MASK_CLASS_SUBCLASS: u32 = 0xffff00;
>> +
>> + /// Create a `Class` from the raw class code value, or `None` if the value doesn't
>> + /// match any known class.
>> + pub fn from_u32(value: u32) -> Option<Self> {
>> + match value {
>> + $(x if x == Self::$variant.0 => Some(Self::$variant),)+
>> + _ => None,
>> + }
>> + }
>> +
>> + /// Get the raw 24-bit class code value.
>> + pub const fn as_u32(self) -> u32 {
>> + self.0
>> + }
>> + }
>> + };
>> +}
>> +
>> +define_all_pci_classes! {
>> + NOT_DEFINED = bindings::PCI_CLASS_NOT_DEFINED, // 0x000000
>> +
>> + ...
>> +
>> + OTHERS = bindings::PCI_CLASS_OTHERS, // 0xff0000
>> +}
>> +
>> /// An adapter for the registration of PCI drivers.
>> pub struct Adapter<T: Driver>(T);
>>
>> @@ -157,6 +330,23 @@ pub const fn from_class(class: u32, class_mask: u32) -> Self {
>> override_only: 0,
>> })
>> }
>> +
>> + /// Create a new `pci::DeviceId` from a class number, mask, and specific vendor.
>> + ///
>> + /// This is more targeted than [`DeviceId::from_class`]: in addition to matching by Vendor, it
>> + /// also matches the PCI Class (up to the entire 24 bits, depending on the mask).
>> + pub const fn from_class_and_vendor(class: Class, class_mask: u32, vendor: u32) -> Self {
>> + Self(bindings::pci_device_id {
>> + vendor,
>> + device: DeviceId::PCI_ANY_ID,
>> + subvendor: DeviceId::PCI_ANY_ID,
>> + subdevice: DeviceId::PCI_ANY_ID,
>> + class: class.as_u32(),
>> + class_mask,
>> + driver_data: 0,
>> + override_only: 0,
>> + })
>> + }
>> }
>>
>> // SAFETY: `DeviceId` is a `#[repr(transparent)]` wrapper of `pci_device_id` and does not add
>> @@ -410,6 +600,18 @@ pub fn resource_len(&self, bar: u32) -> Result<bindings::resource_size_t> {
>> // - by its type invariant `self.as_raw` is always a valid pointer to a `struct pci_dev`.
>> Ok(unsafe { bindings::pci_resource_len(self.as_raw(), bar.try_into()?) })
>> }
>> +
>> + /// Returns the full 24-bit PCI class code as stored in hardware.
>> + /// This includes base class, subclass, and programming interface.
>> + pub fn class_code_raw(&self) -> u32 {
>> + // SAFETY: `self.as_raw` is a valid pointer to a `struct pci_dev`.
>> + unsafe { (*self.as_raw()).class }
>> + }
>> +
>> + /// Returns the PCI class as a `Class` struct, or `None` if the class code is invalid.
>> + pub fn class_enum(&self) -> Option<Class> {
>> + Class::from_u32(self.class_code_raw())
>> + }
>> }
>>
>> impl Device<device::Bound> {
>> --
>> 2.50.1
>
> All of the functions could probably be `#[inline]`ed, though I'm not
> sure how much it affects the `const` functions, since they're already
> evaluated at compile-time.
These are not in a hot path, which is why the other, similar functions
nearby are not inlined.
>
> Reviewed-by: Elle Rhumsaa <elle@weathered-steel.dev>
Thanks for the review of the series!
thanks,
--
John Hubbard
next prev parent reply other threads:[~2025-08-20 17:22 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-18 1:33 [PATCH v2 0/3] rust, nova-core: PCI Class, Vendor support John Hubbard
2025-08-18 1:33 ` [PATCH v2 1/3] rust: pci: provide access to PCI Class, subclass, implementation values John Hubbard
2025-08-18 12:23 ` Alexandre Courbot
2025-08-18 18:49 ` John Hubbard
2025-08-18 14:57 ` Danilo Krummrich
2025-08-18 18:58 ` John Hubbard
2025-08-20 3:48 ` Elle Rhumsaa
2025-08-20 17:22 ` John Hubbard [this message]
2025-08-22 1:03 ` Miguel Ojeda
2025-08-18 1:33 ` [PATCH v2 2/3] gpu: nova-core: avoid probing non-display/compute PCI functions John Hubbard
2025-08-20 3:50 ` Elle Rhumsaa
2025-08-18 1:33 ` [PATCH v2 3/3] rust: pci: provide access to PCI Vendor values John Hubbard
2025-08-18 16:06 ` Danilo Krummrich
2025-08-18 18:59 ` John Hubbard
2025-08-20 3:54 ` Elle Rhumsaa
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