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From: Nam Cao <namcao@linutronix.de>
To: "Marc Zyngier" <maz@kernel.org>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	"Karthikeyan Mitran" <m.karthikeyan@mobiveil.co.in>,
	"Hou Zhiqiang" <Zhiqiang.Hou@nxp.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Pali Rohár" <pali@kernel.org>,
	"K . Y . Srinivasan" <kys@microsoft.com>,
	"Haiyang Zhang" <haiyangz@microsoft.com>,
	"Wei Liu" <wei.liu@kernel.org>,
	"Dexuan Cui" <decui@microsoft.com>,
	"Joyce Ooi" <joyce.ooi@intel.com>,
	"Jim Quinlan" <jim2101024@gmail.com>,
	"Nicolas Saenz Julienne" <nsaenz@kernel.org>,
	"Florian Fainelli" <florian.fainelli@broadcom.com>,
	"Broadcom internal kernel review list"
	<bcm-kernel-feedback-list@broadcom.com>,
	"Ray Jui" <rjui@broadcom.com>,
	"Scott Branden" <sbranden@broadcom.com>,
	"Ryder Lee" <ryder.lee@mediatek.com>,
	"Jianjun Wang" <jianjun.wang@mediatek.com>,
	"Marek Vasut" <marek.vasut+renesas@gmail.com>,
	"Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>,
	"Michal Simek" <michal.simek@amd.com>,
	"Daire McNamara" <daire.mcnamara@microchip.com>,
	"Nirmal Patel" <nirmal.patel@linux.intel.com>,
	"Jonathan Derrick" <jonathan.derrick@linux.dev>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-hyperv@vger.kernel.org,
	linux-rpi-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	linux-renesas-soc@vger.kernel.org
Cc: Nam Cao <namcao@linutronix.de>
Subject: [PATCH 07/16] PCI: mediatek-gen3: Switch to msi_create_parent_irq_domain()
Date: Thu, 26 Jun 2025 16:47:57 +0200	[thread overview]
Message-ID: <bfbd2e375269071b69e1aa85e629ee4b7c99518f.1750858083.git.namcao@linutronix.de> (raw)
In-Reply-To: <cover.1750858083.git.namcao@linutronix.de>

Move away from the legacy MSI domain setup, switch to use
msi_create_parent_irq_domain().

Signed-off-by: Nam Cao <namcao@linutronix.de>
---
Cc: Ryder Lee <ryder.lee@mediatek.com>
Cc: Jianjun Wang <jianjun.wang@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc: linux-mediatek@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
---
 drivers/pci/controller/Kconfig              |  1 +
 drivers/pci/controller/pcie-mediatek-gen3.c | 67 ++++++++-------------
 2 files changed, 26 insertions(+), 42 deletions(-)

diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig
index 375a019f35bd9..ec32c343a751d 100644
--- a/drivers/pci/controller/Kconfig
+++ b/drivers/pci/controller/Kconfig
@@ -203,6 +203,7 @@ config PCIE_MEDIATEK_GEN3
 	tristate "MediaTek Gen3 PCIe controller"
 	depends on ARCH_AIROHA || ARCH_MEDIATEK || COMPILE_TEST
 	depends on PCI_MSI
+	select IRQ_MSI_LIB
 	help
 	  Adds support for PCIe Gen3 MAC controller for MediaTek SoCs.
 	  This PCIe controller is compatible with Gen3, Gen2 and Gen1 speed,
diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c
index 5464b4ae5c20c..97147f43e41c5 100644
--- a/drivers/pci/controller/pcie-mediatek-gen3.c
+++ b/drivers/pci/controller/pcie-mediatek-gen3.c
@@ -12,6 +12,7 @@
 #include <linux/delay.h>
 #include <linux/iopoll.h>
 #include <linux/irq.h>
+#include <linux/irqchip/irq-msi-lib.h>
 #include <linux/irqchip/chained_irq.h>
 #include <linux/irqdomain.h>
 #include <linux/kernel.h>
@@ -187,7 +188,6 @@ struct mtk_msi_set {
  * @saved_irq_state: IRQ enable state saved at suspend time
  * @irq_lock: lock protecting IRQ register access
  * @intx_domain: legacy INTx IRQ domain
- * @msi_domain: MSI IRQ domain
  * @msi_bottom_domain: MSI IRQ bottom domain
  * @msi_sets: MSI sets information
  * @lock: lock protecting IRQ bit map
@@ -210,7 +210,6 @@ struct mtk_gen3_pcie {
 	u32 saved_irq_state;
 	raw_spinlock_t irq_lock;
 	struct irq_domain *intx_domain;
-	struct irq_domain *msi_domain;
 	struct irq_domain *msi_bottom_domain;
 	struct mtk_msi_set msi_sets[PCIE_MSI_SET_NUM];
 	struct mutex lock;
@@ -526,30 +525,22 @@ static int mtk_pcie_startup_port(struct mtk_gen3_pcie *pcie)
 	return 0;
 }
 
-static void mtk_pcie_msi_irq_mask(struct irq_data *data)
-{
-	pci_msi_mask_irq(data);
-	irq_chip_mask_parent(data);
-}
-
-static void mtk_pcie_msi_irq_unmask(struct irq_data *data)
-{
-	pci_msi_unmask_irq(data);
-	irq_chip_unmask_parent(data);
-}
-
-static struct irq_chip mtk_msi_irq_chip = {
-	.irq_ack = irq_chip_ack_parent,
-	.irq_mask = mtk_pcie_msi_irq_mask,
-	.irq_unmask = mtk_pcie_msi_irq_unmask,
-	.name = "MSI",
-};
-
-static struct msi_domain_info mtk_msi_domain_info = {
-	.flags	= MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
-		  MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX |
-		  MSI_FLAG_MULTI_PCI_MSI,
-	.chip	= &mtk_msi_irq_chip,
+#define MTK_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS	| \
+				MSI_FLAG_USE_DEF_CHIP_OPS	| \
+				MSI_FLAG_NO_AFFINITY		| \
+				MSI_FLAG_PCI_MSI_MASK_PARENT)
+
+#define MTK_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK		| \
+				 MSI_FLAG_PCI_MSIX		| \
+				 MSI_FLAG_MULTI_PCI_MSI)
+
+static const struct msi_parent_ops mtk_msi_parent_ops = {
+	.required_flags		= MTK_MSI_FLAGS_REQUIRED,
+	.supported_flags	= MTK_MSI_FLAGS_SUPPORTED,
+	.bus_select_token	= DOMAIN_BUS_PCI_MSI,
+	.chip_flags		= MSI_CHIP_FLAG_SET_ACK,
+	.prefix			= "MTK3-",
+	.init_dev_msi_info	= msi_lib_init_dev_msi_info,
 };
 
 static void mtk_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
@@ -756,28 +747,23 @@ static int mtk_pcie_init_irq_domains(struct mtk_gen3_pcie *pcie)
 	/* Setup MSI */
 	mutex_init(&pcie->lock);
 
-	pcie->msi_bottom_domain = irq_domain_create_linear(dev_fwnode(dev), PCIE_MSI_IRQS_NUM,
-							   &mtk_msi_bottom_domain_ops, pcie);
+	struct irq_domain_info info = {
+		.fwnode		= dev_fwnode(dev),
+		.ops		= &mtk_msi_bottom_domain_ops,
+		.host_data	= pcie,
+		.size		= PCIE_MSI_IRQS_NUM,
+	};
+
+	pcie->msi_bottom_domain = msi_create_parent_irq_domain(&info, &mtk_msi_parent_ops);
 	if (!pcie->msi_bottom_domain) {
 		dev_err(dev, "failed to create MSI bottom domain\n");
 		ret = -ENODEV;
 		goto err_msi_bottom_domain;
 	}
 
-	pcie->msi_domain = pci_msi_create_irq_domain(dev->fwnode,
-						     &mtk_msi_domain_info,
-						     pcie->msi_bottom_domain);
-	if (!pcie->msi_domain) {
-		dev_err(dev, "failed to create MSI domain\n");
-		ret = -ENODEV;
-		goto err_msi_domain;
-	}
-
 	of_node_put(intc_node);
 	return 0;
 
-err_msi_domain:
-	irq_domain_remove(pcie->msi_bottom_domain);
 err_msi_bottom_domain:
 	irq_domain_remove(pcie->intx_domain);
 out_put_node:
@@ -792,9 +778,6 @@ static void mtk_pcie_irq_teardown(struct mtk_gen3_pcie *pcie)
 	if (pcie->intx_domain)
 		irq_domain_remove(pcie->intx_domain);
 
-	if (pcie->msi_domain)
-		irq_domain_remove(pcie->msi_domain);
-
 	if (pcie->msi_bottom_domain)
 		irq_domain_remove(pcie->msi_bottom_domain);
 
-- 
2.39.5


  parent reply	other threads:[~2025-06-26 14:48 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-26 14:47 [PATCH 00/16] PCI: MSI parent domain conversion Nam Cao
2025-06-26 14:47 ` [PATCH 01/16] PCI: dwc: Switch to msi_create_parent_irq_domain() Nam Cao
2025-07-03 13:19   ` Thomas Gleixner
2025-06-26 14:47 ` [PATCH 02/16] PCI: mobiveil: " Nam Cao
2025-07-03 13:20   ` Thomas Gleixner
2025-06-26 14:47 ` [PATCH 03/16] PCI: aardvark: " Nam Cao
2025-07-03 13:21   ` Thomas Gleixner
2025-06-26 14:47 ` [PATCH 04/16] PCI: altera-msi: " Nam Cao
2025-07-03 13:22   ` Thomas Gleixner
2025-06-26 14:47 ` [PATCH 05/16] PCI: brcmstb: " Nam Cao
2025-06-30 19:18   ` Florian Fainelli
2025-07-03 13:23   ` Thomas Gleixner
2025-06-26 14:47 ` [PATCH 06/16] PCI: iproc: " Nam Cao
2025-06-30 19:17   ` Florian Fainelli
2025-07-03 13:23   ` Thomas Gleixner
2025-06-26 14:47 ` Nam Cao [this message]
2025-07-03 13:24   ` [PATCH 07/16] PCI: mediatek-gen3: " Thomas Gleixner
2025-06-26 14:47 ` [PATCH 08/16] PCI: mediatek: " Nam Cao
2025-07-03 13:25   ` Thomas Gleixner
2025-06-26 14:47 ` [PATCH 09/16] PCI: rcar-host: " Nam Cao
2025-07-03 13:26   ` Thomas Gleixner
2025-06-26 14:48 ` [PATCH 10/16] PCI: xilinx-xdma: " Nam Cao
2025-07-03 13:27   ` Thomas Gleixner
2025-06-26 14:48 ` [PATCH 11/16] PCI: xilinx-nwl: " Nam Cao
2025-07-03 13:28   ` Thomas Gleixner
2025-06-26 14:48 ` [PATCH 12/16] PCI: xilinx: " Nam Cao
2025-07-03 13:29   ` Thomas Gleixner
2025-06-26 14:48 ` [PATCH 13/16] PCI: plda: " Nam Cao
2025-07-03 13:30   ` Thomas Gleixner
2025-06-26 14:48 ` [PATCH 14/16] PCI: hv: " Nam Cao
2025-07-03 13:33   ` Thomas Gleixner
2025-07-03 17:41   ` Michael Kelley
2025-07-03 19:59     ` Thomas Gleixner
2025-07-03 20:15       ` Michael Kelley
2025-07-03 21:00         ` Nam Cao
2025-07-03 21:52           ` Thomas Gleixner
2025-07-03 21:21         ` Thomas Gleixner
2025-07-04  2:27           ` Michael Kelley
2025-07-04  4:32             ` Nam Cao
2025-07-04  4:58               ` Michael Kelley
2025-07-05  2:52   ` kernel test robot
2025-07-05  3:51   ` Michael Kelley
2025-07-05  9:46     ` Nam Cao
2025-07-05 10:02       ` Nam Cao
2025-07-07 19:04         ` Michael Kelley
2025-06-26 14:48 ` [PATCH 15/16] PCI: vmd: Convert to lock guards Nam Cao
2025-07-03 13:34   ` Thomas Gleixner
2025-06-26 14:48 ` [PATCH 16/16] PCI: vmd: Switch to msi_create_parent_irq_domain() Nam Cao
2025-07-03 13:37   ` Thomas Gleixner
2025-07-16 18:10   ` Nirmal Patel
2025-07-16 19:41     ` Bjorn Helgaas
2025-07-16 19:52   ` Antonio Quartulli
2025-07-16 20:12     ` Nam Cao
2025-07-16 20:31       ` Bjorn Helgaas
2025-07-03 17:28 ` [PATCH 00/16] PCI: MSI parent domain conversion Bjorn Helgaas
2025-07-04  4:48   ` Nam Cao
2025-07-07  6:20     ` Manivannan Sadhasivam
2025-07-07  7:43 ` Manivannan Sadhasivam

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