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From: Philipp Stanner <phasta@mailbox.org>
To: Shawn Lin <shawn.lin@rock-chips.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Cc: Nirmal Patel <nirmal.patel@linux.intel.com>,
	Jonathan Derrick <jonathan.derrick@linux.dev>,
	Kurt Schwemmer <kurt.schwemmer@microsemi.com>,
	 Logan Gunthorpe <logang@deltatee.com>,
	Philipp Stanner <phasta@kernel.org>,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH v4 4/7] PCI/MSI: Introduce __pcim_enable_msix_range()
Date: Tue, 12 May 2026 15:26:00 +0200	[thread overview]
Message-ID: <c133ec95f31874624349d38f67362bc5589fb80f.camel@mailbox.org> (raw)
In-Reply-To: <1777017460-243543-5-git-send-email-shawn.lin@rock-chips.com>

On Fri, 2026-04-24 at 15:57 +0800, Shawn Lin wrote:
> Introduce __pcim_enable_msix_range(), a devres-managed variant of
> __pci_enable_msix_range(). Similar to the previously added MSI variant,
> this function provides automatic cleanup of MSI-X interrupts via devres,
> reducing the risk of resource leaks and simplifying driver error handling.
> 
> This function is particularly useful for drivers that already use
> pcim_enable_device() and want consistent devres management for all
> PCI resources, including MSI-X interrupts.
> 
> Drivers can replace calls to __pci_enable_msix_range() with
> __pcim_enable_msix_range() to benefit from automatic cleanup without
> changing their core logic. The flags parameter (e.g., PCI_IRQ_VIRTUAL)
> is fully supported and passed through to the underlying functions.
> 
> This completes the set of devres-managed MSI/MSI-X allocation functions,
> providing a consistent API for driver authors who prefer automatic
> resource management.
> 
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> ---
> 
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
> 
>  drivers/pci/msi/msi.c | 22 ++++++++++++++++++++++
>  drivers/pci/msi/msi.h |  2 ++
>  2 files changed, 24 insertions(+)
> 
> diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c
> index 0aaff57..8fdf40d 100644
> --- a/drivers/pci/msi/msi.c
> +++ b/drivers/pci/msi/msi.c
> @@ -930,6 +930,28 @@ int __pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
>  	return pci_msix_range_init(dev, entries, minvec, nvec, hwsize, affd);
>  }
>  
> +int __pcim_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
> +			     int minvec, int maxvec, struct irq_affinity *affd,
> +			     int flags)
> +{
> +	int hwsize, nvec, rc;
> +
> +	hwsize = pci_msix_range_alloc(dev, entries, minvec,
> +				      maxvec, flags, &nvec);
> +	if (hwsize < 0)
> +		return hwsize;
> +
> +	rc = msi_setup_device_data(&dev->dev);

Uh uh... wait a second.

msi_setup_device_data() also invokes devres below the surface:

int msi_setup_device_data(struct device *dev)
{
	struct msi_device_data *md;
	int ret, i;

	if (dev->msi.data)
		return 0;

	md = devres_alloc(msi_device_data_release, sizeof(*md), GFP_KERNEL);


Do you have an idea whether that is a problem?

Looks suspicious to me. That's more than just automatic memory
management.


Sorry for just seeing that now. I might have seen that last year and
concluded it's one of the reasons why porting is difficult.. can't
remember anymore.


P.


> +	if (rc)
> +		return rc;
> +
> +	rc = devm_add_action(&dev->dev, pcim_msi_release, dev);
> +	if (rc)
> +		return rc;
> +
> +	return pci_msix_range_init(dev, entries, minvec, nvec, hwsize, affd);
> +}
> +
>  void __pci_restore_msix_state(struct pci_dev *dev)
>  {
>  	struct msi_desc *entry;
> diff --git a/drivers/pci/msi/msi.h b/drivers/pci/msi/msi.h
> index 81c6b099..e6364a8 100644
> --- a/drivers/pci/msi/msi.h
> +++ b/drivers/pci/msi/msi.h
> @@ -97,6 +97,8 @@ int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, struct i
>  int __pcim_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, struct irq_affinity *affd);
>  int __pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, int minvec,
>  			    int maxvec,  struct irq_affinity *affd, int flags);
> +int __pcim_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, int minvec,
> +			     int maxvec,  struct irq_affinity *affd, int flags);
>  void __pci_restore_msi_state(struct pci_dev *dev);
>  void __pci_restore_msix_state(struct pci_dev *dev);
>  


  reply	other threads:[~2026-05-12 13:26 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-24  7:57 [PATCH v4 0/7] Add Devres managed IRQ vectors allocation Shawn Lin
2026-04-24  7:57 ` [PATCH v4 1/7] PCI/MSI: Split __pci_enable_msi_range() for reuse Shawn Lin
2026-05-12 13:08   ` Philipp Stanner
2026-05-12 13:09     ` Philipp Stanner
2026-04-24  7:57 ` [PATCH v4 2/7] PCI/MSI: Split __pci_enable_msix_range() " Shawn Lin
2026-05-12 13:20   ` Philipp Stanner
2026-04-24  7:57 ` [PATCH v4 3/7] PCI/MSI: Introduce __pcim_enable_msi_range() Shawn Lin
2026-05-12 13:22   ` Philipp Stanner
2026-04-24  7:57 ` [PATCH v4 4/7] PCI/MSI: Introduce __pcim_enable_msix_range() Shawn Lin
2026-05-12 13:26   ` Philipp Stanner [this message]
2026-04-24  7:57 ` [PATCH v4 5/7] PCI/MSI: Add Devres managed IRQ vectors allocation Shawn Lin
2026-05-12 13:28   ` Philipp Stanner
2026-04-24  7:57 ` [PATCH v4 6/7] PCI: switchtec: Replace pci_alloc_irq_vectors() with pcim_alloc_irq_vectors() Shawn Lin
2026-04-24  7:57 ` [PATCH v4 7/7] PCI: vmd: " Shawn Lin
2026-05-12 12:57   ` Manivannan Sadhasivam
2026-04-24 11:48 ` [PATCH v4 0/7] Add Devres managed IRQ vectors allocation Philipp Stanner

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