From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE6AD13AA4C; Thu, 31 Oct 2024 18:10:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730398240; cv=none; b=dxriDFWQ/Epmlv6BZL2RzwkNYGGK2RIqCjCb9+lx+2/tXWlrbS3IoU9rKDbpr9DTWPFJpNamAFr5TZFGREjQm/+Ty1U2VbwOevYpXg8ddA2wQXvWapsP/0cxUus1MuYstBsTjCtJe1ZmBLtDtUR5dSn0/8AqLc7si3WEacB38KU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730398240; c=relaxed/simple; bh=TcADyLHD8mzD4LXfNgzjzmkk0ShTNI6CxmZOgrOl91Q=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=I3hXINq4viJdW1rtmW3ZpBw7Vdy/Quv0hkpIrrzHBuEvG8sjhEdhMS6lXlXn6IRrfHBiun9HOSdnrK0MKCfMruWkJQvMsZsClJ6Ff/PHIC71aYERmT38J/ad2oJiBs3wYMoLPHyvH0pUX2Bv5unblGpaBMjbcW9fozbx1Nm72pE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=XXJthmwS; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="XXJthmwS" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5D56BC4CEC3; Thu, 31 Oct 2024 18:10:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730398239; bh=TcADyLHD8mzD4LXfNgzjzmkk0ShTNI6CxmZOgrOl91Q=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=XXJthmwS6o3ReObP4f5vEtGbvIS4QbrtRuVHmRJPFElJq2HrVTg2v+oj+pMvedhd+ U5+0ZOd/SCvbWGtBSWZ75/SX344/FMigM4HugD571i8IuL/64S+hw0zbrlzl0bHnJa k62ZtOJkD5nY8Ze1pRnzSm6CUfzfe7eoUWmFVj7DFBsxE5X6kcKtsVGCFX9htGhHaM mTM/lf9Wa5+XMkXbnxl2Sx+MP4Z1LTgyvOcvCq+sqD65p8nNwgvfw9IbQBri6EUSsb cBs80OieUKe0sz2KTwhcG9ihP43F8/ItdW+WPyZOdexYUXRbiY4mSWFc/ezPU2hLKK eildUb86mFV8w== Message-ID: Date: Thu, 31 Oct 2024 19:10:26 +0100 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 02/12] dt-bindings: pinctrl: Add RaspberryPi RP1 gpio/pinctrl/pinmux bindings To: Andrea della Porta Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Lorenzo Pieralisi , Krzysztof Wilczynski , Manivannan Sadhasivam , Bjorn Helgaas , Linus Walleij , Catalin Marinas , Will Deacon , Bartosz Golaszewski , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Saravana Kannan , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-gpio@vger.kernel.org, Masahiro Yamada , Stefan Wahren , Herve Codina , Luca Ceresoli , Thomas Petazzoni , Andrew Lunn References: <9a02498e0fbc135dcbe94adc7fc2d743cf190fac.1730123575.git.andrea.porta@suse.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 31/10/2024 15:07, Andrea della Porta wrote: > Hi Krzysztof, > > On 08:26 Tue 29 Oct , Krzysztof Kozlowski wrote: >> On Mon, Oct 28, 2024 at 03:07:19PM +0100, Andrea della Porta wrote: >>> Add device tree bindings for the gpio/pin/mux controller that is part of >>> the RP1 multi function device, and relative entries in MAINTAINERS file. >>> >>> Signed-off-by: Andrea della Porta >>> --- >>> .../pinctrl/raspberrypi,rp1-gpio.yaml | 163 ++++++++++++++++++ >>> MAINTAINERS | 2 + >>> 2 files changed, 165 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml >>> >>> diff --git a/Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml >>> new file mode 100644 >>> index 000000000000..465a53a6d84f >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml >>> @@ -0,0 +1,163 @@ >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/pinctrl/raspberrypi,rp1-gpio.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: RaspberryPi RP1 GPIO/Pinconf/Pinmux Controller submodule >>> + >>> +maintainers: >>> + - Andrea della Porta >>> + >>> +description: >>> + The RP1 chipset is a Multi Function Device containing, among other sub-peripherals, >>> + a gpio/pinconf/mux controller whose 54 pins are grouped into 3 banks. It works also >> >> Please wrap code according to coding style (checkpatch is not a coding >> style description but only a tool). > > Ack. > >> >>> + as an interrupt controller for those gpios. >>> + >>> +properties: >>> + compatible: >>> + const: raspberrypi,rp1-gpio >>> + >>> + reg: >>> + maxItems: 3 >>> + description: One reg specifier for each one of the 3 pin banks. >>> + >>> + '#gpio-cells': >>> + description: The first cell is the pin number and the second cell is used >>> + to specify the flags (see include/dt-bindings/gpio/gpio.h). >>> + const: 2 >>> + >>> + gpio-controller: true >>> + >>> + gpio-ranges: >>> + maxItems: 1 >>> + >>> + gpio-line-names: >>> + maxItems: 54 >>> + >>> + interrupts: >>> + maxItems: 3 >>> + description: One interrupt specifier for each one of the 3 pin banks. >>> + >>> + '#interrupt-cells': >>> + description: >>> + Specifies the Bank number [0, 1, 2] and Flags as defined in >>> + include/dt-bindings/interrupt-controller/irq.h. >>> + const: 2 >>> + >>> + interrupt-controller: true >>> + >>> +additionalProperties: >> >> Not much improved. You are supposed to have here pattern, just like >> other bindings. I asked for this last time. >> >> And there are examples using it - almost all or most of pinctrl >> bindings, including bindings having subnodes (but you do not use such >> case here). > > This is the same approach used in [1], which seems quite recent. I did't 2021, so not that recent, but you are right that it's not the example I would recommend. See rather: git grep pins -- Documentation/devicetree/bindings/pinctrl/ | grep '\$' pins, groups, states, etc. > use pattern because I wouldn't really want to enforce a particular naming > scheme. Subnodes are used, please see below. Since pinctrl.yaml explicitly But we want to enforce, because it brings uniformity and matches partially generic naming patterns. > says that there is no common binding but each device has its own, I > thought that was reasonable choice. Should I enforce some common pattern, > then? Yes, you should. Again, look at other bindings, e.g. qcom tlmm or lpass lpi. > >> >>> + anyOf: >>> + - type: object >>> + additionalProperties: false >>> + allOf: >>> + - $ref: pincfg-node.yaml# >>> + - $ref: pinmux-node.yaml# >>> + >>> + description: >>> + Pin controller client devices use pin configuration subnodes (children >>> + and grandchildren) for desired pin configuration. >>> + Client device subnodes use below standard properties. >>> + >>> + properties: >>> + pins: >>> + description: >>> + A string (or list of strings) adhering to the pattern 'gpio[0-5][0-9]' >>> + function: true >>> + bias-disable: true >>> + bias-pull-down: true >>> + bias-pull-up: true >>> + slew-rate: >>> + description: 0 is slow slew rate, 1 is fast slew rate >>> + enum: [ 0, 1 ] >>> + drive-strength: >>> + enum: [ 2, 4, 8, 12 ] >>> + >>> + - type: object >>> + additionalProperties: >>> + $ref: "#/additionalProperties/anyOf/0" >> >> Your example does not use any subnodes, so this looks not needed. > > The example has subnodes, as in the following excerpt from the example: I meant, you do not need properties in subnodes (1st level). You only want properties in subnodes of subnodes, so 2nd level. What is the point of allowing them in 1st level? Best regards, Krzysztof