* [PATCH v5 1/9] PCI/ERR: Update error status after reset_link()
2019-07-23 20:21 [PATCH v5 0/9] Add Error Disconnect Recover (EDR) support sathyanarayanan.kuppuswamy
@ 2019-07-23 20:21 ` sathyanarayanan.kuppuswamy
2019-07-23 20:21 ` [PATCH v5 2/9] PCI/ACPI: Add _OSC based negotiation support for DPC sathyanarayanan.kuppuswamy
` (7 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: sathyanarayanan.kuppuswamy @ 2019-07-23 20:21 UTC (permalink / raw)
To: bhelgaas
Cc: linux-pci, linux-kernel, ashok.raj, keith.busch,
sathyanarayanan.kuppuswamy
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Commit bdb5ac85777d ("PCI/ERR: Handle fatal error recovery") uses
reset_link() to recover from fatal errors. But, if the reset is
successful there is no need to continue the rest of the error recovery
checks. Also, during fatal error recovery, if the initial value of error
status is PCI_ERS_RESULT_DISCONNECT or PCI_ERS_RESULT_NO_AER_DRIVER then
even after successful recovery (using reset_link()) pcie_do_recovery()
will report the recovery result as failure. So update the status of
error after reset_link().
Fixes: bdb5ac85777d ("PCI/ERR: Handle fatal error recovery")
Cc: Ashok Raj <ashok.raj@intel.com>
Cc: Keith Busch <keith.busch@intel.com>
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
---
drivers/pci/pcie/err.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c
index 773197a12568..aecec124a829 100644
--- a/drivers/pci/pcie/err.c
+++ b/drivers/pci/pcie/err.c
@@ -204,9 +204,13 @@ void pcie_do_recovery(struct pci_dev *dev, enum pci_channel_state state,
else
pci_walk_bus(bus, report_normal_detected, &status);
- if (state == pci_channel_io_frozen &&
- reset_link(dev, service) != PCI_ERS_RESULT_RECOVERED)
- goto failed;
+ if (state == pci_channel_io_frozen) {
+ status = reset_link(dev, service);
+ if (status != PCI_ERS_RESULT_RECOVERED)
+ goto failed;
+ else
+ goto done;
+ }
if (status == PCI_ERS_RESULT_CAN_RECOVER) {
status = PCI_ERS_RESULT_RECOVERED;
@@ -228,6 +232,7 @@ void pcie_do_recovery(struct pci_dev *dev, enum pci_channel_state state,
if (status != PCI_ERS_RESULT_RECOVERED)
goto failed;
+done:
pci_dbg(dev, "broadcast resume message\n");
pci_walk_bus(bus, report_resume, &status);
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v5 2/9] PCI/ACPI: Add _OSC based negotiation support for DPC
2019-07-23 20:21 [PATCH v5 0/9] Add Error Disconnect Recover (EDR) support sathyanarayanan.kuppuswamy
2019-07-23 20:21 ` [PATCH v5 1/9] PCI/ERR: Update error status after reset_link() sathyanarayanan.kuppuswamy
@ 2019-07-23 20:21 ` sathyanarayanan.kuppuswamy
2019-07-23 20:21 ` [PATCH v5 3/9] PCI/ACPI: Expose EDR support via _OSC to BIOS sathyanarayanan.kuppuswamy
` (6 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: sathyanarayanan.kuppuswamy @ 2019-07-23 20:21 UTC (permalink / raw)
To: bhelgaas
Cc: linux-pci, linux-kernel, ashok.raj, keith.busch,
sathyanarayanan.kuppuswamy, Rafael J. Wysocki, Len Brown
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
As per PCI firmware specification r3.2 Downstream Port Containment
Related Enhancements ECN, sec 4.5.1, table 4-6, OS can use bit 7 of _OSC
Control Field to negotiate control over Downstream Port Containment
(DPC) configuration of PCIe port.
After _OSC negotiation, firmware will Set this bit to grant OS control
over PCIe DPC configuration and Clear it if this feature was requested
and denied, or was not requested.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Len Brown <lenb@kernel.org>
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
---
drivers/acpi/pci_root.c | 6 ++++++
drivers/pci/pcie/portdrv_core.c | 3 ++-
drivers/pci/probe.c | 1 +
include/linux/acpi.h | 3 ++-
include/linux/pci.h | 2 +-
5 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 314a187ed572..73b08f40b0da 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -142,6 +142,7 @@ static struct pci_osc_bit_struct pci_osc_control_bit[] = {
{ OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
{ OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
{ OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" },
+ { OSC_PCI_EXPRESS_DPC_CONTROL, "DPC" },
};
static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
@@ -488,6 +489,9 @@ static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm,
control |= OSC_PCI_EXPRESS_AER_CONTROL;
}
+ if (IS_ENABLED(CONFIG_PCIE_DPC))
+ control |= OSC_PCI_EXPRESS_DPC_CONTROL;
+
requested = control;
status = acpi_pci_osc_control_set(handle, &control,
OSC_PCI_EXPRESS_CAPABILITY_CONTROL);
@@ -917,6 +921,8 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
host_bridge->native_pme = 0;
if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
host_bridge->native_ltr = 0;
+ if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL))
+ host_bridge->native_dpc = 0;
/*
* Evaluate the "PCI Boot Configuration" _DSM Function. If it
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 308c3e0c4a34..58c40fe7856f 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -252,7 +252,8 @@ static int get_port_device_capability(struct pci_dev *dev)
}
if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) &&
- pci_aer_available() && services & PCIE_PORT_SERVICE_AER)
+ pci_aer_available() && services & PCIE_PORT_SERVICE_AER &&
+ (pcie_ports_native || host->native_dpc))
services |= PCIE_PORT_SERVICE_DPC;
if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM ||
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index a3c7338fad86..cf8acdd62089 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -601,6 +601,7 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge)
bridge->native_shpc_hotplug = 1;
bridge->native_pme = 1;
bridge->native_ltr = 1;
+ bridge->native_dpc = 1;
}
struct pci_host_bridge *pci_alloc_host_bridge(size_t priv)
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 9426b9aaed86..8959ed322e15 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -525,7 +525,8 @@ extern bool osc_pc_lpi_support_confirmed;
#define OSC_PCI_EXPRESS_AER_CONTROL 0x00000008
#define OSC_PCI_EXPRESS_CAPABILITY_CONTROL 0x00000010
#define OSC_PCI_EXPRESS_LTR_CONTROL 0x00000020
-#define OSC_PCI_CONTROL_MASKS 0x0000003f
+#define OSC_PCI_EXPRESS_DPC_CONTROL 0x00000080
+#define OSC_PCI_CONTROL_MASKS 0x000000ff
#define ACPI_GSB_ACCESS_ATTRIB_QUICK 0x00000002
#define ACPI_GSB_ACCESS_ATTRIB_SEND_RCV 0x00000004
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 9e700d9f9f28..9145136ca728 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -510,7 +510,7 @@ struct pci_host_bridge {
unsigned int native_pme:1; /* OS may use PCIe PME */
unsigned int native_ltr:1; /* OS may use PCIe LTR */
unsigned int preserve_config:1; /* Preserve FW resource setup */
-
+ unsigned int native_dpc:1; /* OS may use PCIe DPC */
/* Resource alignment requirements */
resource_size_t (*align_resource)(struct pci_dev *dev,
const struct resource *res,
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v5 3/9] PCI/ACPI: Expose EDR support via _OSC to BIOS
2019-07-23 20:21 [PATCH v5 0/9] Add Error Disconnect Recover (EDR) support sathyanarayanan.kuppuswamy
2019-07-23 20:21 ` [PATCH v5 1/9] PCI/ERR: Update error status after reset_link() sathyanarayanan.kuppuswamy
2019-07-23 20:21 ` [PATCH v5 2/9] PCI/ACPI: Add _OSC based negotiation support for DPC sathyanarayanan.kuppuswamy
@ 2019-07-23 20:21 ` sathyanarayanan.kuppuswamy
2019-07-23 20:21 ` [PATCH v5 4/9] PCI/DPC: Allow dpc_probe() even if firmware first mode is enabled sathyanarayanan.kuppuswamy
` (5 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: sathyanarayanan.kuppuswamy @ 2019-07-23 20:21 UTC (permalink / raw)
To: bhelgaas
Cc: linux-pci, linux-kernel, ashok.raj, keith.busch,
sathyanarayanan.kuppuswamy, Rafael J. Wysocki, Len Brown
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
As per PCI firmware specification r3.2 Downstream Port Containment
Related Enhancements ECN, sec 4.5.1, table 4-4, if OS supports EDR,
it should expose its support to BIOS by setting bit 7 of _OSC Support
Field.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Len Brown <lenb@kernel.org>
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
---
drivers/acpi/pci_root.c | 3 +++
include/linux/acpi.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 73b08f40b0da..988d09d788b6 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -132,6 +132,7 @@ static struct pci_osc_bit_struct pci_osc_support_bit[] = {
{ OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
{ OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
{ OSC_PCI_MSI_SUPPORT, "MSI" },
+ { OSC_PCI_EDR_SUPPORT, "EDR" },
{ OSC_PCI_HPX_TYPE_3_SUPPORT, "HPX-Type3" },
};
@@ -442,6 +443,8 @@ static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm,
support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
if (pci_msi_enabled())
support |= OSC_PCI_MSI_SUPPORT;
+ if (IS_ENABLED(CONFIG_PCIE_EDR))
+ support |= OSC_PCI_EDR_SUPPORT;
decode_osc_support(root, "OS supports", support);
status = acpi_pci_osc_support(root, support);
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 8959ed322e15..b6b43da85d26 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -515,6 +515,7 @@ extern bool osc_pc_lpi_support_confirmed;
#define OSC_PCI_CLOCK_PM_SUPPORT 0x00000004
#define OSC_PCI_SEGMENT_GROUPS_SUPPORT 0x00000008
#define OSC_PCI_MSI_SUPPORT 0x00000010
+#define OSC_PCI_EDR_SUPPORT 0x00000080
#define OSC_PCI_HPX_TYPE_3_SUPPORT 0x00000100
#define OSC_PCI_SUPPORT_MASKS 0x0000011f
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v5 4/9] PCI/DPC: Allow dpc_probe() even if firmware first mode is enabled
2019-07-23 20:21 [PATCH v5 0/9] Add Error Disconnect Recover (EDR) support sathyanarayanan.kuppuswamy
` (2 preceding siblings ...)
2019-07-23 20:21 ` [PATCH v5 3/9] PCI/ACPI: Expose EDR support via _OSC to BIOS sathyanarayanan.kuppuswamy
@ 2019-07-23 20:21 ` sathyanarayanan.kuppuswamy
2019-07-23 20:21 ` [PATCH v5 5/9] PCI/DPC: Add dpc_process_error() wrapper function sathyanarayanan.kuppuswamy
` (4 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: sathyanarayanan.kuppuswamy @ 2019-07-23 20:21 UTC (permalink / raw)
To: bhelgaas
Cc: linux-pci, linux-kernel, ashok.raj, keith.busch,
sathyanarayanan.kuppuswamy
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
As per ACPI specification v6.3, sec 5.6.6, Error Disconnect Recover
(EDR) notification used by firmware to let OS know about the DPC event
and permit OS to perform error recovery when processing the EDR
notification. Also, as per PCI firmware specification r3.2 Downstream
Port Containment Related Enhancements ECN, sec 4.5.1, table 4-6, if DPC
is controlled by firmware (firmware first mode), it's responsible for
initializing Downstream Port Containment Extended Capability Structures
per firmware policy. And, OS is permitted to read or write DPC Control
and Status registers of a port while processing an Error Disconnect
Recover (EDR) notification from firmware on that port.
Currently, if firmware controls DPC (firmware first mode), OS will not
create/enumerate DPC PCIe port services. But, if OS supports EDR
feature, then as mentioned in above spec references, it should permit
enumeration of DPC driver and also support handling ACPI EDR
notification. So as first step, allow dpc_probe() to continue even if
firmware first mode is enabled. Also add appropriate checks to ensure
device registers are not modified outside EDR notification window in
firmware first mode. This is a preparatory patch for adding EDR support.
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
---
drivers/pci/pcie/dpc.c | 49 +++++++++++++++++++++++++++++++-----------
1 file changed, 36 insertions(+), 13 deletions(-)
diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
index a32ec3487a8d..9717fda012f8 100644
--- a/drivers/pci/pcie/dpc.c
+++ b/drivers/pci/pcie/dpc.c
@@ -22,6 +22,8 @@ struct dpc_dev {
u16 cap_pos;
bool rp_extensions;
u8 rp_log_size;
+ /* Set True if DPC is controlled by firmware */
+ bool firmware_dpc;
};
static const char * const rp_pio_error_string[] = {
@@ -69,6 +71,9 @@ void pci_save_dpc_state(struct pci_dev *dev)
if (!dpc)
return;
+ if (dpc->firmware_dpc)
+ return;
+
save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_DPC);
if (!save_state)
return;
@@ -90,6 +95,9 @@ void pci_restore_dpc_state(struct pci_dev *dev)
if (!dpc)
return;
+ if (dpc->firmware_dpc)
+ return;
+
save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_DPC);
if (!save_state)
return;
@@ -291,9 +299,6 @@ static int dpc_probe(struct pcie_device *dev)
int status;
u16 ctl, cap;
- if (pcie_aer_get_firmware_first(pdev))
- return -ENOTSUPP;
-
dpc = devm_kzalloc(device, sizeof(*dpc), GFP_KERNEL);
if (!dpc)
return -ENOMEM;
@@ -302,13 +307,25 @@ static int dpc_probe(struct pcie_device *dev)
dpc->dev = dev;
set_service_data(dev, dpc);
- status = devm_request_threaded_irq(device, dev->irq, dpc_irq,
- dpc_handler, IRQF_SHARED,
- "pcie-dpc", dpc);
- if (status) {
- pci_warn(pdev, "request IRQ%d failed: %d\n", dev->irq,
- status);
- return status;
+ if (pcie_aer_get_firmware_first(pdev))
+ dpc->firmware_dpc = 1;
+
+ /*
+ * If DPC is handled in firmware and ACPI support is not enabled
+ * in OS, skip probe and return error.
+ */
+ if (dpc->firmware_dpc && !IS_ENABLED(CONFIG_ACPI))
+ return -ENODEV;
+
+ if (!dpc->firmware_dpc) {
+ status = devm_request_threaded_irq(device, dev->irq, dpc_irq,
+ dpc_handler, IRQF_SHARED,
+ "pcie-dpc", dpc);
+ if (status) {
+ pci_warn(pdev, "request IRQ%d failed: %d\n", dev->irq,
+ status);
+ return status;
+ }
}
pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CAP, &cap);
@@ -323,9 +340,12 @@ static int dpc_probe(struct pcie_device *dev)
dpc->rp_log_size = 0;
}
}
-
- ctl = (ctl & 0xfff4) | PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN;
- pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl);
+ if (!dpc->firmware_dpc) {
+ ctl = (ctl & 0xfff4) |
+ (PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN);
+ pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL,
+ ctl);
+ }
pci_info(pdev, "error containment capabilities: Int Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c\n",
cap & PCI_EXP_DPC_IRQ, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT),
@@ -343,6 +363,9 @@ static void dpc_remove(struct pcie_device *dev)
struct pci_dev *pdev = dev->port;
u16 ctl;
+ if (dpc->firmware_dpc)
+ return;
+
pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl);
ctl &= ~(PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN);
pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl);
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v5 5/9] PCI/DPC: Add dpc_process_error() wrapper function
2019-07-23 20:21 [PATCH v5 0/9] Add Error Disconnect Recover (EDR) support sathyanarayanan.kuppuswamy
` (3 preceding siblings ...)
2019-07-23 20:21 ` [PATCH v5 4/9] PCI/DPC: Allow dpc_probe() even if firmware first mode is enabled sathyanarayanan.kuppuswamy
@ 2019-07-23 20:21 ` sathyanarayanan.kuppuswamy
2019-07-23 20:21 ` [PATCH v5 6/9] PCI/DPC: Add Error Disconnect Recover (EDR) support sathyanarayanan.kuppuswamy
` (3 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: sathyanarayanan.kuppuswamy @ 2019-07-23 20:21 UTC (permalink / raw)
To: bhelgaas
Cc: linux-pci, linux-kernel, ashok.raj, keith.busch,
sathyanarayanan.kuppuswamy
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
With Error Disconnect Recover (EDR) support, we need to support
processing DPC event either from DPC IRQ or ACPI EDR event. So create
a wrapper function dpc_process_error() and move common error handling
code in to it. It will be used to process the DPC event in both DPC IRQ
and EDR ACPI event contexts.
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
---
drivers/pci/pcie/dpc.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
index 9717fda012f8..4137ec7b48cc 100644
--- a/drivers/pci/pcie/dpc.c
+++ b/drivers/pci/pcie/dpc.c
@@ -232,10 +232,9 @@ static int dpc_get_aer_uncorrect_severity(struct pci_dev *dev,
return 1;
}
-static irqreturn_t dpc_handler(int irq, void *context)
+static void dpc_process_error(struct dpc_dev *dpc)
{
struct aer_err_info info;
- struct dpc_dev *dpc = context;
struct pci_dev *pdev = dpc->dev->port;
u16 cap = dpc->cap_pos, status, source, reason, ext_reason;
@@ -268,6 +267,13 @@ static irqreturn_t dpc_handler(int irq, void *context)
/* We configure DPC so it only triggers on ERR_FATAL */
pcie_do_recovery(pdev, pci_channel_io_frozen, PCIE_PORT_SERVICE_DPC);
+}
+
+static irqreturn_t dpc_handler(int irq, void *context)
+{
+ struct dpc_dev *dpc = context;
+
+ dpc_process_error(dpc);
return IRQ_HANDLED;
}
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v5 6/9] PCI/DPC: Add Error Disconnect Recover (EDR) support
2019-07-23 20:21 [PATCH v5 0/9] Add Error Disconnect Recover (EDR) support sathyanarayanan.kuppuswamy
` (4 preceding siblings ...)
2019-07-23 20:21 ` [PATCH v5 5/9] PCI/DPC: Add dpc_process_error() wrapper function sathyanarayanan.kuppuswamy
@ 2019-07-23 20:21 ` sathyanarayanan.kuppuswamy
2019-07-23 20:21 ` [PATCH v5 7/9] PCI/AER: Allow clearing Error Status Register in FF mode sathyanarayanan.kuppuswamy
` (2 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: sathyanarayanan.kuppuswamy @ 2019-07-23 20:21 UTC (permalink / raw)
To: bhelgaas
Cc: linux-pci, linux-kernel, ashok.raj, keith.busch,
sathyanarayanan.kuppuswamy
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
As per ACPI specification r6.3, sec 5.6.6, when firmware owns Downstream
Port Containment (DPC), its expected to use the "Error Disconnect
Recover" (EDR) notification to alert OSPM of a DPC event and if OS
supports EDR, its expected to handle the software state invalidation and
port recovery in OS, and also let firmware know the recovery status via
_OST ACPI call. Related _OST status codes can be found in ACPI
specification r6.3, sec 6.3.5.2.
Also, as per PCI firmware specification r3.2 Downstream Port Containment
Related Enhancements ECN, sec 4.5.1, table 4-6, If DPC is controlled by
firmware (firmware first mode), firmware is responsible for
configuring the DPC and OS is responsible for error recovery. Also, OS
is allowed to modify DPC registers only during the EDR notification
window. So with EDR support, OS should provide DPC port services even in
firmware first mode.
Cc: Keith Busch <keith.busch@intel.com>
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
---
drivers/pci/pci-acpi.c | 91 +++++++++++++++++++++++
drivers/pci/pcie/Kconfig | 10 +++
drivers/pci/pcie/dpc.c | 127 +++++++++++++++++++++++++++++++-
drivers/pci/pcie/portdrv_core.c | 9 ++-
include/linux/pci-acpi.h | 11 +++
5 files changed, 245 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index 45049f558860..82abab25daf2 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -104,6 +104,97 @@ int acpi_get_rc_resources(struct device *dev, const char *hid, u16 segment,
}
#endif
+#if defined(CONFIG_PCIE_DPC) && defined(CONFIG_ACPI)
+
+/*
+ * _DSM wrapper function to enable/disable DPC port.
+ * @dpc : DPC device structure
+ * @enable: status of DPC port (0 or 1).
+ *
+ * returns 0 on success or errno on failure.
+ */
+int acpi_enable_dpc_port(struct pci_dev *pdev, acpi_handle handle, bool enable)
+{
+ union acpi_object *obj;
+ int status = 0;
+ union acpi_object argv4;
+
+ argv4.type = ACPI_TYPE_INTEGER;
+ argv4.integer.value = enable;
+
+ obj = acpi_evaluate_dsm(handle, &pci_acpi_dsm_guid, 1,
+ EDR_PORT_ENABLE_DSM, &argv4);
+ if (!obj)
+ return -EIO;
+
+ if (obj->type != ACPI_TYPE_INTEGER || obj->integer.value != enable)
+ status = -EIO;
+
+ ACPI_FREE(obj);
+
+ return status;
+}
+
+/*
+ * _DSM wrapper function to locate DPC port.
+ * @dpc : DPC device structure
+ *
+ * returns pci_dev or NULL.
+ */
+struct pci_dev *acpi_locate_dpc_port(struct pci_dev *pdev, acpi_handle handle)
+{
+ union acpi_object *obj;
+ u16 port;
+
+ obj = acpi_evaluate_dsm(handle, &pci_acpi_dsm_guid, 1,
+ EDR_PORT_LOCATE_DSM, NULL);
+ if (!obj)
+ return pci_dev_get(pdev);
+
+ if (obj->type != ACPI_TYPE_INTEGER) {
+ ACPI_FREE(obj);
+ return NULL;
+ }
+
+ /*
+ * Firmware returns DPC port BDF details in following format:
+ * 15:8 = bus
+ * 7:3 = device
+ * 2:0 = function
+ */
+ port = obj->integer.value;
+
+ ACPI_FREE(obj);
+
+ return pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus),
+ PCI_BUS_NUM(port), port & 0xff);
+}
+
+/*
+ * _OST wrapper function to let firmware know the status of EDR event.
+ * @dpc : DPC device structure.
+ * @status: Status of EDR event.
+ */
+int acpi_send_edr_status(struct pci_dev *pdev, acpi_handle handle, u16 status)
+{
+ u32 ost_status;
+
+ pci_dbg(pdev, "Sending EDR status :%x\n", status);
+
+ ost_status = PCI_DEVID(pdev->bus->number, pdev->devfn);
+ ost_status = (ost_status << 16) | status;
+
+ status = acpi_evaluate_ost(handle,
+ ACPI_NOTIFY_DISCONNECT_RECOVER,
+ ost_status, NULL);
+ if (ACPI_FAILURE(status))
+ return -EINVAL;
+
+ return 0;
+}
+
+#endif /* CONFIG_PCIE_DPC && CONFIG_ACPI */
+
phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle)
{
acpi_status status = AE_NOT_EXIST;
diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig
index 362eb8cfa53b..9a05015af7cd 100644
--- a/drivers/pci/pcie/Kconfig
+++ b/drivers/pci/pcie/Kconfig
@@ -150,3 +150,13 @@ config PCIE_BW
This enables PCI Express Bandwidth Change Notification. If
you know link width or rate changes occur only to correct
unreliable links, you may answer Y.
+
+config PCIE_EDR
+ bool "PCI Express Error Disconnect Recover support"
+ default n
+ depends on PCIE_DPC && ACPI
+ help
+ This options adds Error Disconnect Recover support as specified
+ in PCI firmware specification v3.2 Downstream Port Containment
+ Related Enhancements ECN. Enable this if you want to support hybrid
+ DPC model which uses both firmware and OS to implement DPC.
diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
index 4137ec7b48cc..6e350149d793 100644
--- a/drivers/pci/pcie/dpc.c
+++ b/drivers/pci/pcie/dpc.c
@@ -13,6 +13,8 @@
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/pci.h>
+#include <linux/acpi.h>
+#include <linux/pci-acpi.h>
#include "portdrv.h"
#include "../pci.h"
@@ -24,6 +26,11 @@ struct dpc_dev {
u8 rp_log_size;
/* Set True if DPC is controlled by firmware */
bool firmware_dpc;
+ pci_ers_result_t error_state;
+ struct mutex edr_lock;
+#ifdef CONFIG_ACPI
+ struct acpi_device *adev;
+#endif
};
static const char * const rp_pio_error_string[] = {
@@ -152,6 +159,9 @@ static pci_ers_result_t dpc_reset_link(struct pci_dev *pdev)
if (!pcie_wait_for_link(pdev, true))
return PCI_ERS_RESULT_DISCONNECT;
+ /* Since the device recovery is done just update the error state */
+ dpc->error_state = PCI_ERS_RESULT_RECOVERED;
+
return PCI_ERS_RESULT_RECOVERED;
}
@@ -296,13 +306,92 @@ static irqreturn_t dpc_irq(int irq, void *context)
return IRQ_HANDLED;
}
+static void dpc_error_resume(struct pci_dev *dev)
+{
+ struct dpc_dev *dpc = to_dpc_dev(dev);
+
+ dpc->error_state = PCI_ERS_RESULT_RECOVERED;
+}
+
+#ifdef CONFIG_ACPI
+
+static void edr_handle_event(acpi_handle handle, u32 event, void *data)
+{
+ struct dpc_dev *dpc = (struct dpc_dev *) data;
+ struct pci_dev *pdev = dpc->dev->port;
+ u16 status;
+
+ pci_info(pdev, "ACPI event %x received\n", event);
+
+ if (event != ACPI_NOTIFY_DISCONNECT_RECOVER)
+ return;
+
+ /*
+ * Check if _DSM(0xD) is available, and if present locate the
+ * port which issued EDR event.
+ */
+ pdev = acpi_locate_dpc_port(pdev, dpc->adev->handle);
+ if (!pdev) {
+ pdev = dpc->dev->port;
+ pci_err(pdev, "No valid port found\n");
+ return;
+ }
+
+ dpc = to_dpc_dev(pdev);
+ if (!dpc) {
+ pci_err(pdev, "DPC port is NULL\n");
+ goto done;
+ }
+
+ mutex_lock(&dpc->edr_lock);
+
+ dpc->error_state = PCI_ERS_RESULT_DISCONNECT;
+
+ /*
+ * Check if the port supports DPC:
+ *
+ * If port supports DPC, then fall back to default error
+ * recovery.
+ */
+ if (dpc->cap_pos) {
+ /* Check if there is a valid DPC trigger */
+ pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS,
+ &status);
+ if (!(status & PCI_EXP_DPC_STATUS_TRIGGER)) {
+ pci_err(pdev, "Invalid DPC trigger %x\n", status);
+ goto edr_unlock;
+ }
+ dpc_process_error(dpc);
+ }
+
+ /*
+ * If recovery is successful, send _OST(0xF, BDF << 16 | 0x80)
+ * to firmware. If not successful, send _OST(0xF, BDF << 16 | 0x81).
+ */
+ if (dpc->error_state == PCI_ERS_RESULT_RECOVERED)
+ status = 0x80;
+ else
+ status = 0x81;
+
+ acpi_send_edr_status(pdev, dpc->adev->handle, status);
+
+edr_unlock:
+ mutex_unlock(&dpc->edr_lock);
+done:
+ pci_dev_put(pdev);
+
+ return;
+}
+
+#endif
+
#define FLAG(x, y) (((x) & (y)) ? '+' : '-')
static int dpc_probe(struct pcie_device *dev)
{
struct dpc_dev *dpc;
struct pci_dev *pdev = dev->port;
struct device *device = &dev->device;
- int status;
+ int status = 0;
u16 ctl, cap;
dpc = devm_kzalloc(device, sizeof(*dpc), GFP_KERNEL);
@@ -312,6 +401,8 @@ static int dpc_probe(struct pcie_device *dev)
dpc->cap_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DPC);
dpc->dev = dev;
set_service_data(dev, dpc);
+ dpc->error_state = PCI_ERS_RESULT_NONE;
+ mutex_init(&dpc->edr_lock);
if (pcie_aer_get_firmware_first(pdev))
dpc->firmware_dpc = 1;
@@ -334,6 +425,39 @@ static int dpc_probe(struct pcie_device *dev)
}
}
+#ifdef CONFIG_ACPI
+ if (dpc->firmware_dpc) {
+ struct acpi_device *adev = ACPI_COMPANION(&pdev->dev);
+ acpi_status astatus;
+
+ if (!adev) {
+ pci_err(pdev, "No valid ACPI device found\n");
+ return -ENODEV;
+ }
+
+ dpc->adev = adev;
+
+ astatus = acpi_install_notify_handler(adev->handle,
+ ACPI_SYSTEM_NOTIFY,
+ edr_handle_event,
+ dpc);
+
+ if (ACPI_FAILURE(astatus)) {
+ pci_err(pdev,
+ "Install ACPI_SYSTEM_NOTIFY handler failed\n");
+ return -EBUSY;
+ }
+
+ status = acpi_enable_dpc_port(pdev, adev->handle, true);
+ if (status) {
+ pci_err(pdev, "Enable DPC port failed\n");
+ acpi_remove_notify_handler(adev->handle,
+ ACPI_SYSTEM_NOTIFY,
+ edr_handle_event);
+ return status;
+ }
+ }
+#endif
pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CAP, &cap);
pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl);
@@ -384,6 +508,7 @@ static struct pcie_port_service_driver dpcdriver = {
.probe = dpc_probe,
.remove = dpc_remove,
.reset_link = dpc_reset_link,
+ .error_resume = dpc_error_resume,
};
int __init pcie_dpc_init(void)
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 58c40fe7856f..acf3a9ec2227 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -251,9 +251,14 @@ static int get_port_device_capability(struct pci_dev *dev)
pcie_pme_interrupt_enable(dev, false);
}
+ /*
+ * If EDR support is enabled in OS, then even if AER is not handled in
+ * OS, DPC service can be enabled.
+ */
if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) &&
- pci_aer_available() && services & PCIE_PORT_SERVICE_AER &&
- (pcie_ports_native || host->native_dpc))
+ ((IS_ENABLED(CONFIG_PCIE_EDR) && !host->native_dpc) ||
+ (pci_aer_available() && services & PCIE_PORT_SERVICE_AER &&
+ (pcie_ports_native || host->native_dpc))))
services |= PCIE_PORT_SERVICE_DPC;
if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM ||
diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h
index 62b7fdcc661c..36ffe1e16e69 100644
--- a/include/linux/pci-acpi.h
+++ b/include/linux/pci-acpi.h
@@ -117,6 +117,17 @@ static inline void acpi_pci_add_bus(struct pci_bus *bus) { }
static inline void acpi_pci_remove_bus(struct pci_bus *bus) { }
#endif /* CONFIG_ACPI */
+#if defined(CONFIG_PCIE_DPC) && defined(CONFIG_ACPI)
+#define EDR_PORT_ENABLE_DSM 0x0C
+#define EDR_PORT_LOCATE_DSM 0x0D
+int acpi_enable_dpc_port(struct pci_dev *pdev, acpi_handle handle,
+ bool enable);
+struct pci_dev *acpi_locate_dpc_port(struct pci_dev *pdev,
+ acpi_handle handle);
+int acpi_send_edr_status(struct pci_dev *pdev,
+ acpi_handle handle, u16 status);
+#endif
+
#ifdef CONFIG_ACPI_APEI
extern bool aer_acpi_firmware_first(void);
#else
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v5 7/9] PCI/AER: Allow clearing Error Status Register in FF mode
2019-07-23 20:21 [PATCH v5 0/9] Add Error Disconnect Recover (EDR) support sathyanarayanan.kuppuswamy
` (5 preceding siblings ...)
2019-07-23 20:21 ` [PATCH v5 6/9] PCI/DPC: Add Error Disconnect Recover (EDR) support sathyanarayanan.kuppuswamy
@ 2019-07-23 20:21 ` sathyanarayanan.kuppuswamy
2019-07-23 20:21 ` [PATCH v5 8/9] PCI/DPC: Add support for DPC recovery on NON_FATAL errors sathyanarayanan.kuppuswamy
2019-07-23 20:21 ` [PATCH v5 9/9] PCI/DPC: Clear AER registers in EDR mode sathyanarayanan.kuppuswamy
8 siblings, 0 replies; 12+ messages in thread
From: sathyanarayanan.kuppuswamy @ 2019-07-23 20:21 UTC (permalink / raw)
To: bhelgaas
Cc: linux-pci, linux-kernel, ashok.raj, keith.busch,
sathyanarayanan.kuppuswamy
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
As per PCI firmware specification r3.2 Downstream Port Containment
Related Enhancements ECN, sec 4.5.1, table 4-6, Error Disconnect
Recover (EDR) support allows OS to handle error recovery and
clearing Error Registers even in FF mode. So remove FF mode checks in
pci_cleanup_aer_uncorrect_error_status(), pci_aer_clear_fatal_status()
and pci_cleanup_aer_error_status_regs() functions.
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
---
drivers/pci/pcie/aer.c | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index b45bc47d04fe..ae5eed084ae5 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -383,9 +383,6 @@ int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
if (!pos)
return -EIO;
- if (pcie_aer_get_firmware_first(dev))
- return -EIO;
-
/* Clear status bits for ERR_NONFATAL errors only */
pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &sev);
@@ -406,9 +403,6 @@ void pci_aer_clear_fatal_status(struct pci_dev *dev)
if (!pos)
return;
- if (pcie_aer_get_firmware_first(dev))
- return;
-
/* Clear status bits for ERR_FATAL errors only */
pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &sev);
@@ -430,9 +424,6 @@ int pci_cleanup_aer_error_status_regs(struct pci_dev *dev)
if (!pos)
return -EIO;
- if (pcie_aer_get_firmware_first(dev))
- return -EIO;
-
port_type = pci_pcie_type(dev);
if (port_type == PCI_EXP_TYPE_ROOT_PORT) {
pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &status);
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v5 8/9] PCI/DPC: Add support for DPC recovery on NON_FATAL errors
2019-07-23 20:21 [PATCH v5 0/9] Add Error Disconnect Recover (EDR) support sathyanarayanan.kuppuswamy
` (6 preceding siblings ...)
2019-07-23 20:21 ` [PATCH v5 7/9] PCI/AER: Allow clearing Error Status Register in FF mode sathyanarayanan.kuppuswamy
@ 2019-07-23 20:21 ` sathyanarayanan.kuppuswamy
2019-07-25 16:50 ` Keith Busch
2019-07-23 20:21 ` [PATCH v5 9/9] PCI/DPC: Clear AER registers in EDR mode sathyanarayanan.kuppuswamy
8 siblings, 1 reply; 12+ messages in thread
From: sathyanarayanan.kuppuswamy @ 2019-07-23 20:21 UTC (permalink / raw)
To: bhelgaas
Cc: linux-pci, linux-kernel, ashok.raj, keith.busch,
sathyanarayanan.kuppuswamy
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Currently, in native mode, DPC driver is configured to trigger DPC only
for FATAL errors and hence it only supports port recovery for FATAL
errors. But with Error Disconnect Recover (EDR) support, DPC
configuration is done by firmware, and hence we should expect DPC
triggered for both FATAL/NON-FATAL errors. So add support for DPC
recovery with NON-FATAL errors.
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
---
drivers/pci/pcie/dpc.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
index 6e350149d793..5d328812aea9 100644
--- a/drivers/pci/pcie/dpc.c
+++ b/drivers/pci/pcie/dpc.c
@@ -267,15 +267,20 @@ static void dpc_process_error(struct dpc_dev *dpc)
/* show RP PIO error detail information */
if (dpc->rp_extensions && reason == 3 && ext_reason == 0)
dpc_process_rp_pio_error(dpc);
- else if (reason == 0 &&
+ else if (reason <= 2 &&
dpc_get_aer_uncorrect_severity(pdev, &info) &&
aer_get_device_error_info(pdev, &info)) {
aer_print_error(pdev, &info);
pci_cleanup_aer_uncorrect_error_status(pdev);
- pci_aer_clear_fatal_status(pdev);
+ if (reason != 1)
+ pci_aer_clear_fatal_status(pdev);
}
- /* We configure DPC so it only triggers on ERR_FATAL */
+ /*
+ * Irrespective of whether the DPC event is triggered by
+ * ERR_FATAL or ERR_NONFATAL, since the link is already down,
+ * use the FATAL error recovery path for both cases.
+ */
pcie_do_recovery(pdev, pci_channel_io_frozen, PCIE_PORT_SERVICE_DPC);
}
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v5 8/9] PCI/DPC: Add support for DPC recovery on NON_FATAL errors
2019-07-23 20:21 ` [PATCH v5 8/9] PCI/DPC: Add support for DPC recovery on NON_FATAL errors sathyanarayanan.kuppuswamy
@ 2019-07-25 16:50 ` Keith Busch
2019-07-26 20:54 ` sathyanarayanan kuppuswamy
0 siblings, 1 reply; 12+ messages in thread
From: Keith Busch @ 2019-07-25 16:50 UTC (permalink / raw)
To: sathyanarayanan.kuppuswamy@linux.intel.com
Cc: bhelgaas@google.com, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, Raj, Ashok, Busch, Keith
On Tue, Jul 23, 2019 at 01:21:50PM -0700, sathyanarayanan.kuppuswamy@linux.intel.com wrote:
> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>
> Currently, in native mode, DPC driver is configured to trigger DPC only
> for FATAL errors and hence it only supports port recovery for FATAL
> errors. But with Error Disconnect Recover (EDR) support, DPC
> configuration is done by firmware, and hence we should expect DPC
> triggered for both FATAL/NON-FATAL errors. So add support for DPC
> recovery with NON-FATAL errors.
>
> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> ---
> drivers/pci/pcie/dpc.c | 11 ++++++++---
> 1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
> index 6e350149d793..5d328812aea9 100644
> --- a/drivers/pci/pcie/dpc.c
> +++ b/drivers/pci/pcie/dpc.c
> @@ -267,15 +267,20 @@ static void dpc_process_error(struct dpc_dev *dpc)
> /* show RP PIO error detail information */
> if (dpc->rp_extensions && reason == 3 && ext_reason == 0)
> dpc_process_rp_pio_error(dpc);
> - else if (reason == 0 &&
> + else if (reason <= 2 &&
> dpc_get_aer_uncorrect_severity(pdev, &info) &&
> aer_get_device_error_info(pdev, &info)) {
> aer_print_error(pdev, &info);
> pci_cleanup_aer_uncorrect_error_status(pdev);
> - pci_aer_clear_fatal_status(pdev);
> + if (reason != 1)
> + pci_aer_clear_fatal_status(pdev);
I'm not quite sure I understand the above. If the reason is 1 or 2,
then the DSP received an error message from something downstream. In
otherwords, the port was notified an error occured somewhere, but it
was not the device that detected that error, so we should not expect
aer_print_error on that device to show anything useful. Right?
> }
>
> - /* We configure DPC so it only triggers on ERR_FATAL */
> + /*
> + * Irrespective of whether the DPC event is triggered by
> + * ERR_FATAL or ERR_NONFATAL, since the link is already down,
> + * use the FATAL error recovery path for both cases.
> + */
> pcie_do_recovery(pdev, pci_channel_io_frozen, PCIE_PORT_SERVICE_DPC);
> }
>
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v5 8/9] PCI/DPC: Add support for DPC recovery on NON_FATAL errors
2019-07-25 16:50 ` Keith Busch
@ 2019-07-26 20:54 ` sathyanarayanan kuppuswamy
0 siblings, 0 replies; 12+ messages in thread
From: sathyanarayanan kuppuswamy @ 2019-07-26 20:54 UTC (permalink / raw)
To: Keith Busch
Cc: bhelgaas@google.com, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, Raj, Ashok, Busch, Keith
On 7/25/19 9:50 AM, Keith Busch wrote:
> On Tue, Jul 23, 2019 at 01:21:50PM -0700, sathyanarayanan.kuppuswamy@linux.intel.com wrote:
>> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>>
>> Currently, in native mode, DPC driver is configured to trigger DPC only
>> for FATAL errors and hence it only supports port recovery for FATAL
>> errors. But with Error Disconnect Recover (EDR) support, DPC
>> configuration is done by firmware, and hence we should expect DPC
>> triggered for both FATAL/NON-FATAL errors. So add support for DPC
>> recovery with NON-FATAL errors.
>>
>> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>> ---
>> drivers/pci/pcie/dpc.c | 11 ++++++++---
>> 1 file changed, 8 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
>> index 6e350149d793..5d328812aea9 100644
>> --- a/drivers/pci/pcie/dpc.c
>> +++ b/drivers/pci/pcie/dpc.c
>> @@ -267,15 +267,20 @@ static void dpc_process_error(struct dpc_dev *dpc)
>> /* show RP PIO error detail information */
>> if (dpc->rp_extensions && reason == 3 && ext_reason == 0)
>> dpc_process_rp_pio_error(dpc);
>> - else if (reason == 0 &&
>> + else if (reason <= 2 &&
>> dpc_get_aer_uncorrect_severity(pdev, &info) &&
>> aer_get_device_error_info(pdev, &info)) {
>> aer_print_error(pdev, &info);
>> pci_cleanup_aer_uncorrect_error_status(pdev);
>> - pci_aer_clear_fatal_status(pdev);
>> + if (reason != 1)
>> + pci_aer_clear_fatal_status(pdev);
> I'm not quite sure I understand the above. If the reason is 1 or 2,
> then the DSP received an error message from something downstream. In
> otherwords, the port was notified an error occured somewhere, but it
> was not the device that detected that error, so we should not expect
> aer_print_error on that device to show anything useful. Right?
My intention here was to just clear the AER registers. EDR spec expects
OS to clear AER registers during DPC event (irrespective of DPC trigger
reason). Consider a case where DPC is triggered due to ERR_FATAL
message, but at the same time the port has some correctable errors
logged. So before handling DPC, we need to clear the AER registers.
Since there is no AER driver to handle AER registers in EDR mode, we
need to clear AER registers in the same code path. But I got your point
about there is nothing to report/print if the reason != 0. I think the
correct way to clear all AER registers is to use
pci_cleanup_aer_error_status_regs(). I will fix this and send a new
patch set.
>
>> }
>>
>> - /* We configure DPC so it only triggers on ERR_FATAL */
>> + /*
>> + * Irrespective of whether the DPC event is triggered by
>> + * ERR_FATAL or ERR_NONFATAL, since the link is already down,
>> + * use the FATAL error recovery path for both cases.
>> + */
>> pcie_do_recovery(pdev, pci_channel_io_frozen, PCIE_PORT_SERVICE_DPC);
>> }
>>
>> --
>> 2.21.0
>>
--
Sathyanarayanan Kuppuswamy
Linux kernel developer
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v5 9/9] PCI/DPC: Clear AER registers in EDR mode
2019-07-23 20:21 [PATCH v5 0/9] Add Error Disconnect Recover (EDR) support sathyanarayanan.kuppuswamy
` (7 preceding siblings ...)
2019-07-23 20:21 ` [PATCH v5 8/9] PCI/DPC: Add support for DPC recovery on NON_FATAL errors sathyanarayanan.kuppuswamy
@ 2019-07-23 20:21 ` sathyanarayanan.kuppuswamy
8 siblings, 0 replies; 12+ messages in thread
From: sathyanarayanan.kuppuswamy @ 2019-07-23 20:21 UTC (permalink / raw)
To: bhelgaas
Cc: linux-pci, linux-kernel, ashok.raj, keith.busch,
sathyanarayanan.kuppuswamy
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
As per PCI firmware specification r3.2 Downstream Port Containment
Related Enhancements ECN, OS is responsible for clearing the AER
registers in EDR mode. So clear AER registers in dpc_process_error()
function.
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
---
drivers/pci/pcie/dpc.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
index 5d328812aea9..7eff5617d052 100644
--- a/drivers/pci/pcie/dpc.c
+++ b/drivers/pci/pcie/dpc.c
@@ -276,6 +276,10 @@ static void dpc_process_error(struct dpc_dev *dpc)
pci_aer_clear_fatal_status(pdev);
}
+ /* In EDR mode, OS is responsible for clearing AER registers */
+ if (dpc->firmware_dpc)
+ pci_cleanup_aer_error_status_regs(pdev);
+
/*
* Irrespective of whether the DPC event is triggered by
* ERR_FATAL or ERR_NONFATAL, since the link is already down,
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread