[PATCH v7 7/8] PCI/DPC: Clear AER registers in EDR mode

sathyanarayanan.kuppuswamy
2019-08-23T23:27:52Z

As per PCI firmware specification r3.2 Downstream Port Containment
Related Enhancements ECN, OS is responsible for clearing the AER
registers in EDR mode. So clear AER registers in dpc_process_error()
function.

Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Acked-by: Keith Busch <keith.busch@intel.com>
---
drivers/pci/pcie/dpc.c | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
index fafc55c00fe0..de2d892bc7c4 100644
--- a/drivers/pci/pcie/dpc.c
+++ b/drivers/pci/pcie/dpc.c
@@ -275,6 +275,10 @@ static void dpc_process_error(struct dpc_dev *dpc)
pci_aer_clear_fatal_status(pdev);
}

+ /* In EDR mode, OS is responsible for clearing AER registers */
+ if (dpc->firmware_dpc)
+ pci_cleanup_aer_error_status_regs(pdev);
+
/*
* Irrespective of whether the DPC event is triggered by
* ERR_FATAL or ERR_NONFATAL, since the link is already down,
--
2.21.0