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Sun, 02 Nov 2025 22:26:48 -0800 (PST) Received: from geday ([2804:7f2:800b:fff9::dead:c001]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2952699b603sm107777285ad.79.2025.11.02.22.26.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Nov 2025 22:26:48 -0800 (PST) Date: Mon, 3 Nov 2025 03:26:35 -0300 From: Geraldo Nascimento To: linux-rockchip@lists.infradead.org Cc: Shawn Lin , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski , Conor Dooley , Johan Jonker , Geraldo Nascimento Subject: [RFC PATCH 0/2] PCI: rockchip-host: support quirky devices Message-ID: Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline With these two changes I'm able to work with a Samsung PM981a OEM SSD that is known to be not-working with Rockchip-IP PCIe. Previously I attempted a contrived solution that mostly worked for my simple purposes but was rather inelegant and impractical. Now I have isolated the behavior to the three lines in the two commits. Omit those three lines and you get a working set with the kernel. I have no idea how to actually implement this in a way that makes sense and doesn't break the PCIe spec but it is my sincere wish that interested RK3399 parties test the change and report any regressions with already-working devices and specifically, successes or failures of initial link-training with these changes. Geraldo Nascimento (2): arm64: dts: rockchip: drop PCIe 3v3 always-on/boot-on PCI: rockchip-host: drop wait on PERST# toggle arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 2 -- drivers/pci/controller/pcie-rockchip-host.c | 1 - 2 files changed, 3 deletions(-) -- 2.49.0