Re: [PPC] Boot problems after the pci-v6.18-changes

[Christian Zigotzky <chzigotzky@xenosoft.de>]

On 09 October 2025 at 07:37 am, Lukas Wunner wrote:
> On Thu, Oct 09, 2025 at 06:54:58AM +0200, Christian Zigotzky wrote:
>> On 08 October 2025 at 09:51 pm, Bjorn Helgaas wrote:
>>> On Wed, Oct 08, 2025 at 06:35:42PM +0200, Christian Zigotzky wrote:
>>>> Our PPC boards [1] have boot problems since the pci-v6.18-changes. [2]
>>>>
>>>> Without the pci-v6.18-changes, the PPC boards boot without any problems.
>>>>
>>>> Boot log with error messages:
>>>> https://github.com/user-attachments/files/22782016/Kernel_6.18_with_PCI_changes.log
>>>>
>>>> Further information: https://github.com/chzigotzky/kernels/issues/17
>>> Do you happen to have a similar log from a recent working kernel,
>>> e.g., v6.17, that we could compare with?
>> Thanks for your answer. Here is a similar log from the kernel 6.17.0:
>> https://github.com/user-attachments/files/22789946/Kernel_6.17.0_Cyrus_Plus_board_P5040.log
> These lines are added in v6.18:
>
>    pci 0000:01:00.0: ASPM: DT platform, enabling L0s-up L0s-dw L1 ASPM-L1.1 ASPM-L1.2 PCI-PM-L1.1 PCI-PM-L1.2
>    pci 0000:01:00.0: ASPM: DT platform, enabling ClockPM
>    pci 0001:01:00.0: ASPM: DT platform, enabling L0s-up L0s-dw L1 ASPM-L1.1 ASPM-L1.2 PCI-PM-L1.1 PCI-PM-L1.2
>    pci 0001:01:00.0: ASPM: DT platform, enabling ClockPM
>    pci 0001:03:00.0: ASPM: DT platform, enabling L0s-up L0s-dw L1 ASPM-L1.1 ASPM-L1.2 PCI-PM-L1.1 PCI-PM-L1.2
>    pci 0001:03:00.0: ASPM: DT platform, enabling ClockPM
>
> Possible candidate:
>
> f3ac2ff14834 ("PCI/ASPM: Enable all ClockPM and ASPM states for devicetree platforms")
>
> ...
>
> Thanks,
>
> Lukas
Hello Lukas,

After reverting the commit f3ac2ff14834, the kernel boots without any 
problems.

f3ac2ff14834 ("PCI/ASPM: Enable all ClockPM and ASPM states for 
devicetree platforms") is the bad commit.

Thanks,

Christian