From: Christian Zigotzky <chzigotzky@xenosoft.de>
To: Manivannan Sadhasivam <mani@kernel.org>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, mad skateman <madskateman@gmail.com>,
"R.T.Dickinson" <rtd2@xtra.co.nz>,
Christian Zigotzky <info@xenosoft.de>,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>,
hypexed@yahoo.com.au, Darren Stevens <darren@stevens-zone.net>,
debian-powerpc@lists.debian.org,
John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>,
Lukas Wunner <lukas@wunner.de>,
regressions@lists.linux.dev
Subject: Re: [PPC] Boot problems after the pci-v6.18-changes
Date: Mon, 3 Nov 2025 19:28:19 +0100 [thread overview]
Message-ID: <d93eac4d-b382-97dd-d829-98aef6695204@xenosoft.de> (raw)
In-Reply-To: <emjne6l33e3hukef5ms7kubv6kkuvesqkw6ozojnzzdgvso7ma@rbpg2l5i3nno>
On 11/01/2025 06:06 PM, Manivannan Sadhasivam wrote:
> On Sat, Nov 01, 2025 at 08:59:37AM +0100, Christian Zigotzky wrote:
>>
>> Bjorn Helgaas <helgaas@kernel.org> wrote:
>>
>> Oops, I made that fixup run too late. Instead of the patch above, can
>> you test the one below?
>>
>> You'll likely see something like this, which is a little misleading
>> because even though we claim "default L1" for 01:00.0 (or whatever
>> your Radeon is), the fact that L0s and L1 are disabled at the other
>> end of the link (00:00.0) should prevent us from actually enabling it:
>>
>> pci 0000:00:00.0: Disabling ASPM L0s/L1
>> pci 0000:01:00.0: ASPM: default states L1
>>
>> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
>> index 214ed060ca1b..27777ded9a2c 100644
>> --- a/drivers/pci/quirks.c
>> +++ b/drivers/pci/quirks.c
>> @@ -2524,6 +2524,7 @@ static void quirk_disable_aspm_l0s_l1(struct
pci_dev *dev)
>> * disable both L0s and L1 for now to be safe.
>> */
>> DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x1080,
quirk_disable_aspm_l0s_l1);
>> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, 0x0451,
quirk_disable_aspm_l0s_l1);
>>
>> /*
>> * Some Pericom PCIe-to-PCI bridges in reverse mode need the PCIe Retrain
>>
>> —
>>
>> Hi Bjorn,
>>
>> Thanks for your patch. I patched the RC3 of kernel 6.18 with your
new patch and compiled it again. Unfortunately the FSL Cyrus+ board
doesn't boot with your new patch.
>>
>> Sorry,
>>
>> Christian
>>
>> --
>> Sent with BrassMonkey 33.9.1
(https://github.com/chzigotzky/Web-Browsers-and-Suites-for-Linux-PPC/releases/tag/BrassMonkey_33.9.1)
>>
>> —-
>>
>> What about with
>>
>> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_ANY_ID,
quirk_disable_aspm_l0s_l1);
>>
>
> The issue is most likely with your Root Port rather than with the
Radeon device.
> So the quirk for Radeon won't fix the issue properly as it will
affect other
> host systems as well.
>
> I guess Bjorn's change didn't help because the fixup ran before
> pcie_aspm_init_link_state(). So even though the fixup disabled the
ASPM link
> state for Root Port, it got enabled by the default ASPM states enabled in
> pcie_aspm_init_link_state().
>
> Can you try doing fixup final as below?
>
> ```
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index d97335a40193..74d8596b3f62 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -2524,6 +2524,7 @@ static void quirk_disable_aspm_l0s_l1(struct
pci_dev *dev)
> * disable both L0s and L1 for now to be safe.
> */
> DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x1080,
quirk_disable_aspm_l0s_l1);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_FREESCALE, 0x0451,
quirk_disable_aspm_l0s_l1);
>
> /*
> * Some Pericom PCIe-to-PCI bridges in reverse mode need the PCIe
Retrain
> ```
>
> Sorry, I guess we are asking for too many experiments to be done
which might be
> of trouble for you. But without direct access to the device, we had
to do these
> :(
>
> Thanks for your help in debugging.
>
> - Mani
>
I tested your patch with the RC4 of kernel 6.18 today. Unfortunately it
doesn't solve the boot issue.
- Christian
--
Sent with BrassMonkey 33.9.1
(https://github.com/chzigotzky/Web-Browsers-and-Suites-for-Linux-PPC/releases/tag/BrassMonkey_33.9.1)
next prev parent reply other threads:[~2025-11-03 18:28 UTC|newest]
Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <3eedbe78-1fbd-4763-a7f3-ac5665e76a4a@xenosoft.de>
[not found] ` <15731ad7-83ff-c7ef-e4a1-8b11814572c2@xenosoft.de>
[not found] ` <17e37b22-5839-0e3a-0dbf-9c676adb0dec@xenosoft.de>
[not found] ` <3b210c92-4be6-ce49-7512-bb194475eeab@xenosoft.de>
2021-11-09 15:10 ` [PASEMI] Nemo board doesn't recognize any ATA disks with the pci-v5.16 updates Christian Zigotzky
2021-11-09 16:58 ` Bjorn Helgaas
2021-11-09 22:40 ` Krzysztof Wilczyński
2021-11-09 23:05 ` Arnd Bergmann
2021-11-09 23:18 ` Krzysztof Wilczyński
2021-11-10 16:42 ` Robert Święcki
2021-11-10 3:52 ` Damien Le Moal
2021-11-10 18:07 ` Christian Zigotzky
2021-11-10 18:41 ` Bjorn Helgaas
2021-11-10 19:09 ` Marc Zyngier
2021-11-11 5:24 ` Christian Zigotzky
2021-11-11 7:13 ` Marc Zyngier
2021-11-11 7:47 ` Christian Zigotzky
2021-11-11 10:20 ` Marc Zyngier
2021-11-11 10:44 ` Christian Zigotzky
2021-11-11 11:24 ` Marc Zyngier
2021-11-11 11:54 ` Christian Zigotzky
2021-11-11 22:21 ` Olof Johansson
2021-11-12 11:49 ` Segher Boessenkool
2021-11-11 17:39 ` Marc Zyngier
2021-11-12 9:40 ` Christian Zigotzky
2021-11-12 10:11 ` Christian Zigotzky
2021-11-12 11:00 ` Christian Zigotzky
2021-11-12 13:41 ` Marc Zyngier
2021-11-12 14:15 ` Christian Zigotzky
2021-11-12 14:46 ` Marc Zyngier
2021-11-12 15:01 ` Christian Zigotzky
2021-11-12 15:05 ` Christian Zigotzky
2025-10-08 16:35 ` [PPC] Boot problems after the pci-v6.18-changes Christian Zigotzky
2025-10-08 16:40 ` John Paul Adrian Glaubitz
2025-10-08 16:47 ` Christian Zigotzky
2025-10-08 19:51 ` Bjorn Helgaas
2025-10-09 4:54 ` Christian Zigotzky
2025-10-09 5:37 ` Lukas Wunner
2025-10-11 5:12 ` Christian Zigotzky
2025-10-11 5:25 ` Lukas Wunner
2025-10-11 15:11 ` Manivannan Sadhasivam
2025-10-11 19:34 ` Christian Zigotzky
2025-10-12 7:47 ` Christian Zigotzky
2025-10-12 8:26 ` Christian Zigotzky
2025-10-13 4:46 ` Christian Zigotzky
2025-10-13 5:02 ` Christian Zigotzky
2025-10-13 5:23 ` Christian Zigotzky
2025-10-13 14:50 ` Christian Zigotzky
2025-10-13 15:02 ` Christian Zigotzky
2025-10-13 15:38 ` Christian Zigotzky
2025-10-13 15:58 ` Manivannan Sadhasivam
[not found] ` <a2ee06b1-28a5-4cb1-9940-b225f9e6d6ee@xenosoft.de>
2025-10-14 4:55 ` Christian Zigotzky
2025-10-15 6:41 ` Manivannan Sadhasivam
2025-10-13 16:01 ` Manivannan Sadhasivam
2025-10-15 8:13 ` Herve Codina
2025-10-15 11:30 ` Christian Zigotzky
2025-10-15 11:58 ` Herve Codina
2025-10-15 12:27 ` Christian Zigotzky
2025-10-15 12:59 ` Herve Codina
[not found] ` <76026544-3472-4953-910A-376DD42BC6D0@xenosoft.de>
2025-10-15 13:17 ` Christian Zigotzky
2025-10-15 13:34 ` Herve Codina
2025-10-15 16:54 ` Christian Zigotzky
2025-10-15 17:15 ` Christian Zigotzky
2025-10-16 3:28 ` Christian Zigotzky
2025-10-16 7:36 ` Christian Zigotzky
2025-10-16 7:53 ` Manivannan Sadhasivam
2025-10-16 10:44 ` Christian Zigotzky
2025-10-17 5:35 ` Christian Zigotzky
2025-10-15 16:23 ` Manivannan Sadhasivam
2025-10-15 13:07 ` Christian Zigotzky
2025-10-15 12:50 ` Manivannan Sadhasivam
2025-10-23 7:38 ` Herve Codina
2025-10-23 8:49 ` Manivannan Sadhasivam
2025-10-23 9:19 ` Herve Codina
2025-10-23 16:59 ` Bjorn Helgaas
2025-10-15 23:40 ` Bjorn Helgaas
2025-10-13 21:06 ` Bjorn Helgaas
2025-10-14 18:51 ` Bjorn Helgaas
2025-10-30 22:11 ` Bjorn Helgaas
2025-11-01 5:39 ` Christian Zigotzky
2025-11-01 7:59 ` Christian Zigotzky
2025-11-01 17:06 ` Manivannan Sadhasivam
2025-11-03 18:28 ` Christian Zigotzky [this message]
2025-11-05 22:09 ` Bjorn Helgaas
2025-11-06 8:48 ` Hongxing Zhu
2025-11-06 18:25 ` Bjorn Helgaas
2025-11-07 2:26 ` Hongxing Zhu
2025-11-07 5:06 ` Christian Zigotzky
2025-11-11 5:15 ` Christian Zigotzky
2025-11-11 12:20 ` Bjorn Helgaas
2025-11-12 3:40 ` Christian Zigotzky
2025-11-13 0:44 ` Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d93eac4d-b382-97dd-d829-98aef6695204@xenosoft.de \
--to=chzigotzky@xenosoft.de \
--cc=bhelgaas@google.com \
--cc=darren@stevens-zone.net \
--cc=debian-powerpc@lists.debian.org \
--cc=glaubitz@physik.fu-berlin.de \
--cc=helgaas@kernel.org \
--cc=hypexed@yahoo.com.au \
--cc=info@xenosoft.de \
--cc=linux-pci@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=lukas@wunner.de \
--cc=madskateman@gmail.com \
--cc=mani@kernel.org \
--cc=regressions@lists.linux.dev \
--cc=rtd2@xtra.co.nz \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).