From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74A05C0018A for ; Mon, 6 Nov 2023 12:42:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230192AbjKFMmN (ORCPT ); Mon, 6 Nov 2023 07:42:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229583AbjKFMmN (ORCPT ); Mon, 6 Nov 2023 07:42:13 -0500 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3BB3AAD; Mon, 6 Nov 2023 04:42:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1699274530; x=1730810530; h=date:from:to:cc:subject:in-reply-to:message-id: references:mime-version; bh=cpxdEtpcZ2PUz94OUq3gxytopBJ1J624EoZVZJrzV38=; b=K5eix7OYwMOvydPS7YRFXGUv7pyNjJpXMcmYx/ELWSg4jqsneW1/1APa 8nZzqSnG49cUKfFNDPvnSHtakpgDE4xXZDLOQO1CnAqhimaNtSlzvymXu O9TbuwAdXAYqUXMabDsvts3l7zbTbA6WSR32O1HUSL8se1FpLC+hbtd5a tAXndSyvSFRdbwUl0wYvgEizx1qds5EeoqySOrYiU0ukexkbrbZpCMAfc 5KLIJgDZFhr6NJVLY77N4k5L9ORaacvs+embgXXNTB1D0T64bG4cWOyRe 4hX/C04xf7FEdYR1m1U1/YkJHxpNr9YZdZce8FQXxwDqOvvkKctiez7CR w==; X-IronPort-AV: E=McAfee;i="6600,9927,10885"; a="392132892" X-IronPort-AV: E=Sophos;i="6.03,281,1694761200"; d="scan'208";a="392132892" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2023 04:42:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10885"; a="797295909" X-IronPort-AV: E=Sophos;i="6.03,281,1694761200"; d="scan'208";a="797295909" Received: from rmstoi-mobl.ger.corp.intel.com ([10.251.216.76]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2023 04:42:01 -0800 Date: Mon, 6 Nov 2023 14:41:58 +0200 (EET) From: =?ISO-8859-15?Q?Ilpo_J=E4rvinen?= To: Mario Limonciello cc: Karol Herbst , Lyude Paul , Alex Deucher , =?ISO-8859-15?Q?Christian_K=F6nig?= , Bjorn Helgaas , Hans de Goede , Mika Westerberg , Lukas Wunner , Danilo Krummrich , David Airlie , Daniel Vetter , Xinhui Pan , "Rafael J . Wysocki" , Mark Gross , Andreas Noever , Michael Jamet , Yehezkel Bernat , =?ISO-8859-15?Q?Pali_Roh=E1r?= , =?ISO-8859-15?Q?Marek_Beh=FAn?= , "Maciej W . Rozycki" , Manivannan Sadhasivam , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , open list , "open list:RADEON and AMDGPU DRM DRIVERS" , "open list:PCI SUBSYSTEM" , "open list:ACPI" , "open list:X86 PLATFORM DRIVERS" , "open list:THUNDERBOLT DRIVER" Subject: Re: [PATCH v2 5/9] PCI: pciehp: Move check for is_thunderbolt into a quirk In-Reply-To: <20231103190758.82911-6-mario.limonciello@amd.com> Message-ID: References: <20231103190758.82911-1-mario.limonciello@amd.com> <20231103190758.82911-6-mario.limonciello@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Fri, 3 Nov 2023, Mario Limonciello wrote: > commit 493fb50e958c ("PCI: pciehp: Assume NoCompl+ for Thunderbolt > ports") added a check into pciehp code to explicitly set NoCompl+ > for all Intel Thunderbolt controllers, including those that don't > need it. > > This overloaded the purpose of the `is_thunderbolt` member of > `struct pci_device` because that means that any controller that > identifies as thunderbolt would set NoCompl+ even if it doesn't > suffer this deficiency. As that commit helpfully specifies all the > controllers with the problem, move them into a PCI quirk. > > Signed-off-by: Mario Limonciello > --- > drivers/pci/hotplug/pciehp_hpc.c | 6 +----- > drivers/pci/quirks.c | 20 ++++++++++++++++++++ > include/linux/pci.h | 1 + > 3 files changed, 22 insertions(+), 5 deletions(-) > > diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c > index fd713abdfb9f..23a92d681d1c 100644 > --- a/drivers/pci/hotplug/pciehp_hpc.c > +++ b/drivers/pci/hotplug/pciehp_hpc.c > @@ -991,11 +991,7 @@ struct controller *pcie_init(struct pcie_device *dev) > if (pdev->hotplug_user_indicators) > slot_cap &= ~(PCI_EXP_SLTCAP_AIP | PCI_EXP_SLTCAP_PIP); > > - /* > - * We assume no Thunderbolt controllers support Command Complete events, > - * but some controllers falsely claim they do. > - */ > - if (pdev->is_thunderbolt) > + if (pdev->no_command_complete) > slot_cap |= PCI_EXP_SLTCAP_NCCS; > > ctrl->slot_cap = slot_cap; > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index eeec1d6f9023..4bbf6e33ca11 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -3807,6 +3807,26 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C > DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PORT_RIDGE, > quirk_thunderbolt_hotplug_msi); > > +/* > + * We assume no Thunderbolt controllers support Command Complete events, > + * but some controllers falsely claim they do. IMO, this wording makes little sense with the new code. How about taking some text from the original commit's changelog: /* * Certain Thunderbolt 1 controllers falsely claim to support Command * Completed events. */ The code change looks fine. -- i. > + */ > +static void quirk_thunderbolt_command_complete(struct pci_dev *pdev) > +{ > + pdev->no_command_complete = 1; > +} > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LIGHT_RIDGE, > + quirk_thunderbolt_command_complete); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EAGLE_RIDGE, > + quirk_thunderbolt_command_complete); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LIGHT_PEAK, > + quirk_thunderbolt_command_complete); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C, > + quirk_thunderbolt_command_complete); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C, > + quirk_thunderbolt_command_complete); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PORT_RIDGE, > + quirk_thunderbolt_command_complete); > #ifdef CONFIG_ACPI > /* > * Apple: Shutdown Cactus Ridge Thunderbolt controller. > diff --git a/include/linux/pci.h b/include/linux/pci.h > index 530b0a360514..439c2dac8a3e 100644 > --- a/include/linux/pci.h > +++ b/include/linux/pci.h > @@ -441,6 +441,7 @@ struct pci_dev { > unsigned int is_hotplug_bridge:1; > unsigned int shpc_managed:1; /* SHPC owned by shpchp */ > unsigned int is_thunderbolt:1; /* Thunderbolt controller */ > + unsigned int no_command_complete:1; /* No command completion */ > /* > * Devices marked being untrusted are the ones that can potentially > * execute DMA attacks and similar. They are typically connected >