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Wed, 23 Sep 2026 11:59:51 -0700 (PDT) Message-ID: Date: Wed, 23 Sep 2026 13:59:49 -0500 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/5] gpio: tc9563: Add support for the embedded GPIO controller To: Bjorn Helgaas , Lorenzo Bianconi Cc: Bjorn Helgaas , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chaitanya Chundru , Linus Walleij , Bartosz Golaszewski , Bjorn Andersson , Konrad Dybcio , Michael Walle , Daniel Thompson , Sushrut Shree Trivedi , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-msm@vger.kernel.org, Bartosz Golaszewski , Manivannan Sadhasivam References: <20260923185242.GA1909536@bhelgaas> Content-Language: en-US From: Alex Elder In-Reply-To: <20260923185242.GA1909536@bhelgaas> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 9/23/26 1:52 PM, Bjorn Helgaas wrote: > Patch [1/5] and a comment below mention 37 GPIOs, this mentions 35. > Are they supposed to match? Maybe 35 doesn't include the two reserved > ones? They are numbered 0..36, and two of them (20 and 21) are reserved. Of those, 10 (numbers 0-6, 12, 35, and 36) exposed outside the TC9564 chip itself. -Alex