[RFC PATCH v3 0/2] Add platform check for subdevice irq domain

Lu Baolu
2021-01-14T01:43:09Z

Hi,

Learnt from the discussions in this thread:

https://lore.kernel.org/linux-pci/160408357912.912050.17005584526266191420.stgit@djiang5-desk3.ch.intel.com/

The device IMS (Interrupt Message Storage) should not be enabled in any
virtualization environments unless there is a HYPERCALL domain which
makes the changes in the message store monitored by the hypervisor.

As the initial step, we allow the IMS to be enabled only if we are
running on the bare metal. It's easy to enable IMS in the virtualization
environments if above preconditions are met in the future.

This series is only for comments purpose. We will include it in the Intel
IMS implementation later once we reach a consensus.

Change log:
v2->v3:
- v2:
https://lore.kernel.org/linux-pci/20210106022749.2769057-1-baolu.lu@linux.intel.com/
- Add all identified heuristics so far.

v1->v2:
- v1:
https://lore.kernel.org/linux-pci/20201210004624.345282-1-baolu.lu@linux.intel.com/
- Rename probably_on_bare_metal() with on_bare_metal();
- Some vendors might use the same name for both bare metal and virtual
environment. Before we add vendor specific code to distinguish
between them, let's return false in on_bare_metal(). This won't
introduce any regression. The only impact is that the coming new
platform msi feature won't be supported until the vendor specific code
is provided.

Best regards,
baolu

Lu Baolu (2):
iommu: Add capability IOMMU_CAP_VIOMMU
platform-msi: Add platform check for subdevice irq domain

arch/x86/pci/common.c | 71 ++++++++++++++++++++++++++++++++++++
drivers/base/platform-msi.c | 8 ++++
drivers/iommu/intel/iommu.c | 20 ++++++++++
drivers/iommu/virtio-iommu.c | 9 +++++
include/linux/iommu.h | 1 +
include/linux/msi.h | 1 +
6 files changed, 110 insertions(+)

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2.25.1